motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-11 03:24:58 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/riscv: Report errors validating 2nd-stage PTEs

Browse source 
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Alistair Francis 2020-03-27 12:54:45 -07:00
parent efe9f9c820
commit 88914473e7
1 changed files with 7 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

9
target/riscv/cpu_helper.c
View file

@ -435,8 +435,13 @@ restart:
hwaddr vbase; hwaddr vbase;
/* Do the second stage translation on the base PTE address. */ /* Do the second stage translation on the base PTE address. */
get_physical_address(env, &vbase, &vbase_prot, base, MMU_DATA_LOAD, int vbase_ret = get_physical_address(env, &vbase, &vbase_prot,
mmu_idx, false, true); base, MMU_DATA_LOAD,
mmu_idx, false, true);
if (vbase_ret != TRANSLATE_SUCCESS) {
return vbase_ret;
}
pte_addr = vbase + idx * ptesize; pte_addr = vbase + idx * ptesize;
} else { } else {