mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-17 07:02:03 -06:00
hw/arm/smmu: Introduce smmu_configs_inv_sid_range() helper
Use a similar terminology smmu_hash_remove_by_sid_range() as the one being used for other hash table matching functions since smmuv3_invalidate_ste() name is not self explanatory, and introduce a helper that invokes the g_hash_table_foreach_remove. No functional change intended. Signed-off-by: JianChunfu <jansef.jian@hj-micro.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20250228031438.3916-1-jansef.jian@hj-micro.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
84e5ce68c0
commit
8881b691d2
5 changed files with 31 additions and 23 deletions
|
@ -225,6 +225,27 @@ static gboolean smmu_hash_remove_by_vmid_ipa(gpointer key, gpointer value,
|
||||||
((entry->iova & ~info->mask) == info->iova);
|
((entry->iova & ~info->mask) == info->iova);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static gboolean
|
||||||
|
smmu_hash_remove_by_sid_range(gpointer key, gpointer value, gpointer user_data)
|
||||||
|
{
|
||||||
|
SMMUDevice *sdev = (SMMUDevice *)key;
|
||||||
|
uint32_t sid = smmu_get_sid(sdev);
|
||||||
|
SMMUSIDRange *sid_range = (SMMUSIDRange *)user_data;
|
||||||
|
|
||||||
|
if (sid < sid_range->start || sid > sid_range->end) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
trace_smmu_config_cache_inv(sid);
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
void smmu_configs_inv_sid_range(SMMUState *s, SMMUSIDRange sid_range)
|
||||||
|
{
|
||||||
|
trace_smmu_configs_inv_sid_range(sid_range.start, sid_range.end);
|
||||||
|
g_hash_table_foreach_remove(s->configs, smmu_hash_remove_by_sid_range,
|
||||||
|
&sid_range);
|
||||||
|
}
|
||||||
|
|
||||||
void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova,
|
void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova,
|
||||||
uint8_t tg, uint64_t num_pages, uint8_t ttl)
|
uint8_t tg, uint64_t num_pages, uint8_t ttl)
|
||||||
{
|
{
|
||||||
|
|
|
@ -141,9 +141,4 @@ typedef struct SMMUIOTLBPageInvInfo {
|
||||||
uint64_t mask;
|
uint64_t mask;
|
||||||
} SMMUIOTLBPageInvInfo;
|
} SMMUIOTLBPageInvInfo;
|
||||||
|
|
||||||
typedef struct SMMUSIDRange {
|
|
||||||
uint32_t start;
|
|
||||||
uint32_t end;
|
|
||||||
} SMMUSIDRange;
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -903,7 +903,7 @@ static void smmuv3_flush_config(SMMUDevice *sdev)
|
||||||
SMMUv3State *s = sdev->smmu;
|
SMMUv3State *s = sdev->smmu;
|
||||||
SMMUState *bc = &s->smmu_state;
|
SMMUState *bc = &s->smmu_state;
|
||||||
|
|
||||||
trace_smmuv3_config_cache_inv(smmu_get_sid(sdev));
|
trace_smmu_config_cache_inv(smmu_get_sid(sdev));
|
||||||
g_hash_table_remove(bc->configs, sdev);
|
g_hash_table_remove(bc->configs, sdev);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1277,20 +1277,6 @@ static void smmuv3_range_inval(SMMUState *s, Cmd *cmd, SMMUStage stage)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static gboolean
|
|
||||||
smmuv3_invalidate_ste(gpointer key, gpointer value, gpointer user_data)
|
|
||||||
{
|
|
||||||
SMMUDevice *sdev = (SMMUDevice *)key;
|
|
||||||
uint32_t sid = smmu_get_sid(sdev);
|
|
||||||
SMMUSIDRange *sid_range = (SMMUSIDRange *)user_data;
|
|
||||||
|
|
||||||
if (sid < sid_range->start || sid > sid_range->end) {
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
trace_smmuv3_config_cache_inv(sid);
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int smmuv3_cmdq_consume(SMMUv3State *s)
|
static int smmuv3_cmdq_consume(SMMUv3State *s)
|
||||||
{
|
{
|
||||||
SMMUState *bs = ARM_SMMU(s);
|
SMMUState *bs = ARM_SMMU(s);
|
||||||
|
@ -1373,8 +1359,7 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
|
||||||
sid_range.end = sid_range.start + mask;
|
sid_range.end = sid_range.start + mask;
|
||||||
|
|
||||||
trace_smmuv3_cmdq_cfgi_ste_range(sid_range.start, sid_range.end);
|
trace_smmuv3_cmdq_cfgi_ste_range(sid_range.start, sid_range.end);
|
||||||
g_hash_table_foreach_remove(bs->configs, smmuv3_invalidate_ste,
|
smmu_configs_inv_sid_range(bs, sid_range);
|
||||||
&sid_range);
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case SMMU_CMD_CFGI_CD:
|
case SMMU_CMD_CFGI_CD:
|
||||||
|
|
|
@ -22,6 +22,8 @@ smmu_iotlb_inv_asid_vmid(int asid, int vmid) "IOTLB invalidate asid=%d vmid=%d"
|
||||||
smmu_iotlb_inv_vmid(int vmid) "IOTLB invalidate vmid=%d"
|
smmu_iotlb_inv_vmid(int vmid) "IOTLB invalidate vmid=%d"
|
||||||
smmu_iotlb_inv_vmid_s1(int vmid) "IOTLB invalidate vmid=%d"
|
smmu_iotlb_inv_vmid_s1(int vmid) "IOTLB invalidate vmid=%d"
|
||||||
smmu_iotlb_inv_iova(int asid, uint64_t addr) "IOTLB invalidate asid=%d addr=0x%"PRIx64
|
smmu_iotlb_inv_iova(int asid, uint64_t addr) "IOTLB invalidate asid=%d addr=0x%"PRIx64
|
||||||
|
smmu_configs_inv_sid_range(uint32_t start, uint32_t end) "Config cache INV SID range from 0x%x to 0x%x"
|
||||||
|
smmu_config_cache_inv(uint32_t sid) "Config cache INV for sid=0x%x"
|
||||||
smmu_inv_notifiers_mr(const char *name) "iommu mr=%s"
|
smmu_inv_notifiers_mr(const char *name) "iommu mr=%s"
|
||||||
smmu_iotlb_lookup_hit(int asid, int vmid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache HIT asid=%d vmid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d"
|
smmu_iotlb_lookup_hit(int asid, int vmid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache HIT asid=%d vmid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d"
|
||||||
smmu_iotlb_lookup_miss(int asid, int vmid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache MISS asid=%d vmid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d"
|
smmu_iotlb_lookup_miss(int asid, int vmid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache MISS asid=%d vmid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d"
|
||||||
|
@ -59,7 +61,6 @@ smmuv3_cmdq_tlbi_nh(int vmid) "vmid=%d"
|
||||||
smmuv3_cmdq_tlbi_nsnh(void) ""
|
smmuv3_cmdq_tlbi_nsnh(void) ""
|
||||||
smmuv3_cmdq_tlbi_nh_asid(int asid) "asid=%d"
|
smmuv3_cmdq_tlbi_nh_asid(int asid) "asid=%d"
|
||||||
smmuv3_cmdq_tlbi_s12_vmid(int vmid) "vmid=%d"
|
smmuv3_cmdq_tlbi_s12_vmid(int vmid) "vmid=%d"
|
||||||
smmuv3_config_cache_inv(uint32_t sid) "Config cache INV for sid=0x%x"
|
|
||||||
smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s"
|
smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s"
|
||||||
smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s"
|
smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s"
|
||||||
smmuv3_inv_notifiers_iova(const char *name, int asid, int vmid, uint64_t iova, uint8_t tg, uint64_t num_pages, int stage) "iommu mr=%s asid=%d vmid=%d iova=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64" stage=%d"
|
smmuv3_inv_notifiers_iova(const char *name, int asid, int vmid, uint64_t iova, uint8_t tg, uint64_t num_pages, int stage) "iommu mr=%s asid=%d vmid=%d iova=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64" stage=%d"
|
||||||
|
|
|
@ -142,6 +142,11 @@ typedef struct SMMUIOTLBKey {
|
||||||
uint8_t level;
|
uint8_t level;
|
||||||
} SMMUIOTLBKey;
|
} SMMUIOTLBKey;
|
||||||
|
|
||||||
|
typedef struct SMMUSIDRange {
|
||||||
|
uint32_t start;
|
||||||
|
uint32_t end;
|
||||||
|
} SMMUSIDRange;
|
||||||
|
|
||||||
struct SMMUState {
|
struct SMMUState {
|
||||||
/* <private> */
|
/* <private> */
|
||||||
SysBusDevice dev;
|
SysBusDevice dev;
|
||||||
|
@ -219,6 +224,7 @@ void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova,
|
||||||
uint8_t tg, uint64_t num_pages, uint8_t ttl);
|
uint8_t tg, uint64_t num_pages, uint8_t ttl);
|
||||||
void smmu_iotlb_inv_ipa(SMMUState *s, int vmid, dma_addr_t ipa, uint8_t tg,
|
void smmu_iotlb_inv_ipa(SMMUState *s, int vmid, dma_addr_t ipa, uint8_t tg,
|
||||||
uint64_t num_pages, uint8_t ttl);
|
uint64_t num_pages, uint8_t ttl);
|
||||||
|
void smmu_configs_inv_sid_range(SMMUState *s, SMMUSIDRange sid_range);
|
||||||
/* Unmap the range of all the notifiers registered to any IOMMU mr */
|
/* Unmap the range of all the notifiers registered to any IOMMU mr */
|
||||||
void smmu_inv_notifiers_all(SMMUState *s);
|
void smmu_inv_notifiers_all(SMMUState *s);
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue