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bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx

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The 'hwaddr' type is defined in "exec/hwaddr.h" as:

    hwaddr is the type of a physical address
   (its size can be different from 'target_ulong').

All definitions use the 'HWADDR_' prefix, except TARGET_FMT_plx:

 $ fgrep define include/exec/hwaddr.h
 #define HWADDR_H
 #define HWADDR_BITS 64
 #define HWADDR_MAX UINT64_MAX
 #define TARGET_FMT_plx "%016" PRIx64
         ^^^^^^
 #define HWADDR_PRId PRId64
 #define HWADDR_PRIi PRIi64
 #define HWADDR_PRIo PRIo64
 #define HWADDR_PRIu PRIu64
 #define HWADDR_PRIx PRIx64
 #define HWADDR_PRIX PRIX64

Since hwaddr's size can be *different* from target_ulong, it is
very confusing to read one of its format using the 'TARGET_FMT_'
prefix, normally used for the target_long / target_ulong types:

$ fgrep TARGET_FMT_ include/exec/cpu-defs.h
 #define TARGET_FMT_lx "%08x"
 #define TARGET_FMT_ld "%d"
 #define TARGET_FMT_lu "%u"
 #define TARGET_FMT_lx "%016" PRIx64
 #define TARGET_FMT_ld "%" PRId64
 #define TARGET_FMT_lu "%" PRIu64

Apparently this format was missed during commit a8170e5e97
("Rename target_phys_addr_t to hwaddr"), so complete it by
doing a bulk-rename with:

 $ sed -i -e s/TARGET_FMT_plx/HWADDR_FMT_plx/g $(git grep -l TARGET_FMT_plx)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230110212947.34557-1-philmd@linaro.org>
[thuth: Fix some warnings from checkpatch.pl along the way]
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Philippe Mathieu-Daudé 2023-01-10 22:29:47 +01:00 • committed by Thomas Huth
parent 6e6761d8fb
commit 883f2c591f
69 changed files with 237 additions and 238 deletions
Download patch file Download diff file Expand all files Collapse all files

26
hw/net/rocker/rocker.c
View file

@ -815,7 +815,7 @@ static void rocker_io_writel(void *opaque, hwaddr addr, uint32_t val)
}
break;
default:
DPRINTF("not implemented dma reg write(l) addr=0x" TARGET_FMT_plx
DPRINTF("not implemented dma reg write(l) addr=0x" HWADDR_FMT_plx
" val=0x%08x (ring %d, addr=0x%02x)\n",
addr, val, index, offset);
break;
@ -857,7 +857,7 @@ static void rocker_io_writel(void *opaque, hwaddr addr, uint32_t val)
r->lower32 = 0;
break;
default:
DPRINTF("not implemented write(l) addr=0x" TARGET_FMT_plx
DPRINTF("not implemented write(l) addr=0x" HWADDR_FMT_plx
" val=0x%08x\n", addr, val);
break;
}
@ -876,8 +876,8 @@ static void rocker_io_writeq(void *opaque, hwaddr addr, uint64_t val)
desc_ring_set_base_addr(r->rings[index], val);
break;
default:
DPRINTF("not implemented dma reg write(q) addr=0x" TARGET_FMT_plx
" val=0x" TARGET_FMT_plx " (ring %d, offset=0x%02x)\n",
DPRINTF("not implemented dma reg write(q) addr=0x" HWADDR_FMT_plx
" val=0x" HWADDR_FMT_plx " (ring %d, offset=0x%02x)\n",
addr, val, index, offset);
break;
}
@ -895,8 +895,8 @@ static void rocker_io_writeq(void *opaque, hwaddr addr, uint64_t val)
rocker_port_phys_enable_write(r, val);
break;
default:
DPRINTF("not implemented write(q) addr=0x" TARGET_FMT_plx
" val=0x" TARGET_FMT_plx "\n", addr, val);
DPRINTF("not implemented write(q) addr=0x" HWADDR_FMT_plx
" val=0x" HWADDR_FMT_plx "\n", addr, val);
break;
}
}
@ -987,8 +987,8 @@ static const char *rocker_reg_name(void *opaque, hwaddr addr)
static void rocker_mmio_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
DPRINTF("Write %s addr " TARGET_FMT_plx
", size %u, val " TARGET_FMT_plx "\n",
DPRINTF("Write %s addr " HWADDR_FMT_plx
", size %u, val " HWADDR_FMT_plx "\n",
rocker_reg_name(opaque, addr), addr, size, val);
switch (size) {
@ -1060,7 +1060,7 @@ static uint32_t rocker_io_readl(void *opaque, hwaddr addr)
ret = desc_ring_get_credits(r->rings[index]);
break;
default:
DPRINTF("not implemented dma reg read(l) addr=0x" TARGET_FMT_plx
DPRINTF("not implemented dma reg read(l) addr=0x" HWADDR_FMT_plx
" (ring %d, addr=0x%02x)\n", addr, index, offset);
ret = 0;
break;
@ -1115,7 +1115,7 @@ static uint32_t rocker_io_readl(void *opaque, hwaddr addr)
ret = (uint32_t)(r->switch_id >> 32);
break;
default:
DPRINTF("not implemented read(l) addr=0x" TARGET_FMT_plx "\n", addr);
DPRINTF("not implemented read(l) addr=0x" HWADDR_FMT_plx "\n", addr);
ret = 0;
break;
}
@ -1136,7 +1136,7 @@ static uint64_t rocker_io_readq(void *opaque, hwaddr addr)
ret = desc_ring_get_base_addr(r->rings[index]);
break;
default:
DPRINTF("not implemented dma reg read(q) addr=0x" TARGET_FMT_plx
DPRINTF("not implemented dma reg read(q) addr=0x" HWADDR_FMT_plx
" (ring %d, addr=0x%02x)\n", addr, index, offset);
ret = 0;
break;
@ -1165,7 +1165,7 @@ static uint64_t rocker_io_readq(void *opaque, hwaddr addr)
ret = r->switch_id;
break;
default:
DPRINTF("not implemented read(q) addr=0x" TARGET_FMT_plx "\n", addr);
DPRINTF("not implemented read(q) addr=0x" HWADDR_FMT_plx "\n", addr);
ret = 0;
break;
}
@ -1174,7 +1174,7 @@ static uint64_t rocker_io_readq(void *opaque, hwaddr addr)
static uint64_t rocker_mmio_read(void *opaque, hwaddr addr, unsigned size)
{
DPRINTF("Read %s addr " TARGET_FMT_plx ", size %u\n",
DPRINTF("Read %s addr " HWADDR_FMT_plx ", size %u\n",
rocker_reg_name(opaque, addr), addr, size);
switch (size) {

2
hw/net/rocker/rocker_desc.c
View file

@ -104,7 +104,7 @@ static bool desc_ring_empty(DescRing *ring)
bool desc_ring_set_base_addr(DescRing *ring, uint64_t base_addr)
{
if (base_addr & 0x7) {
DPRINTF("ERROR: ring[%d] desc base addr (0x" TARGET_FMT_plx
DPRINTF("ERROR: ring[%d] desc base addr (0x" HWADDR_FMT_plx
") not 8-byte aligned\n", ring->index, base_addr);
return false;
}