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target/xtensa: extract debug helpers

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Move HELPER functions related to native debugging from op_helper.c to
dbg_helper.c. No functional changes.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2019-01-13 19:34:05 -08:00
parent 7e5e5a6302
commit 8803bfea0e
3 changed files with 130 additions and 92 deletions
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92
target/xtensa/op_helper.c
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@ -93,19 +93,6 @@ void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
addr);
}
static void tb_invalidate_virtual_addr(CPUXtensaState *env, uint32_t vaddr)
{
uint32_t paddr;
uint32_t page_size;
unsigned access;
int ret = xtensa_get_physical_addr(env, false, vaddr, 2, 0,
&paddr, &page_size, &access);
if (ret == 0) {
tb_invalidate_phys_addr(&address_space_memory, paddr,
MEMTXATTRS_UNSPECIFIED);
}
}
#endif
void HELPER(exception)(CPUXtensaState *env, uint32_t excp)
@ -325,85 +312,6 @@ void HELPER(wsr_memctl)(CPUXtensaState *env, uint32_t v)
env->sregs[MEMCTL] = v & env->config->memctl_mask;
}
void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v)
{
uint32_t change = v ^ env->sregs[IBREAKENABLE];
unsigned i;
for (i = 0; i < env->config->nibreak; ++i) {
if (change & (1 << i)) {
tb_invalidate_virtual_addr(env, env->sregs[IBREAKA + i]);
}
}
env->sregs[IBREAKENABLE] = v & ((1 << env->config->nibreak) - 1);
}
void HELPER(wsr_ibreaka)(CPUXtensaState *env, uint32_t i, uint32_t v)
{
if (env->sregs[IBREAKENABLE] & (1 << i) && env->sregs[IBREAKA + i] != v) {
tb_invalidate_virtual_addr(env, env->sregs[IBREAKA + i]);
tb_invalidate_virtual_addr(env, v);
}
env->sregs[IBREAKA + i] = v;
}
static void set_dbreak(CPUXtensaState *env, unsigned i, uint32_t dbreaka,
uint32_t dbreakc)
{
CPUState *cs = CPU(xtensa_env_get_cpu(env));
int flags = BP_CPU | BP_STOP_BEFORE_ACCESS;
uint32_t mask = dbreakc | ~DBREAKC_MASK;
if (env->cpu_watchpoint[i]) {
cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]);
}
if (dbreakc & DBREAKC_SB) {
flags |= BP_MEM_WRITE;
}
if (dbreakc & DBREAKC_LB) {
flags |= BP_MEM_READ;
}
/* contiguous mask after inversion is one less than some power of 2 */
if ((~mask + 1) & ~mask) {
qemu_log_mask(LOG_GUEST_ERROR, "DBREAKC mask is not contiguous: 0x%08x\n", dbreakc);
/* cut mask after the first zero bit */
mask = 0xffffffff << (32 - clo32(mask));
}
if (cpu_watchpoint_insert(cs, dbreaka & mask, ~mask + 1,
flags, &env->cpu_watchpoint[i])) {
env->cpu_watchpoint[i] = NULL;
qemu_log_mask(LOG_GUEST_ERROR, "Failed to set data breakpoint at 0x%08x/%d\n",
dbreaka & mask, ~mask + 1);
}
}
void HELPER(wsr_dbreaka)(CPUXtensaState *env, uint32_t i, uint32_t v)
{
uint32_t dbreakc = env->sregs[DBREAKC + i];
if ((dbreakc & DBREAKC_SB_LB) &&
env->sregs[DBREAKA + i] != v) {
set_dbreak(env, i, v, dbreakc);
}
env->sregs[DBREAKA + i] = v;
}
void HELPER(wsr_dbreakc)(CPUXtensaState *env, uint32_t i, uint32_t v)
{
if ((env->sregs[DBREAKC + i] ^ v) & (DBREAKC_SB_LB | DBREAKC_MASK)) {
if (v & DBREAKC_SB_LB) {
set_dbreak(env, i, env->sregs[DBREAKA + i], v);
} else {
if (env->cpu_watchpoint[i]) {
CPUState *cs = CPU(xtensa_env_get_cpu(env));
cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]);
env->cpu_watchpoint[i] = NULL;
}
}
}
env->sregs[DBREAKC + i] = v;
}
#endif
uint32_t HELPER(rer)(CPUXtensaState *env, uint32_t addr)