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hw/intc: Initial commit of lowRISC Ibex PLIC

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The Ibex core contains a PLIC that although similar to the RISC-V spec
is not RISC-V spec compliant.

This patch implements a Ibex PLIC in a somewhat generic way.

As the current RISC-V PLIC needs tidying up, my hope is that as the Ibex
PLIC move towards spec compliance this PLIC implementation can be
updated until it can replace the current PLIC.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
This commit is contained in:
Alistair Francis 2020-04-23 18:34:15 -07:00
parent a7d2d98c59
commit 879f60f01c
4 changed files with 327 additions and 0 deletions
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63
include/hw/intc/ibex_plic.h Normal file
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/*
* QEMU RISC-V lowRISC Ibex PLIC
*
* Copyright (c) 2020 Western Digital
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2 or later, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef HW_IBEX_PLIC_H
#define HW_IBEX_PLIC_H
#include "hw/sysbus.h"
#define TYPE_IBEX_PLIC "ibex-plic"
#define IBEX_PLIC(obj) \
OBJECT_CHECK(IbexPlicState, (obj), TYPE_IBEX_PLIC)
typedef struct IbexPlicState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
MemoryRegion mmio;
uint32_t *pending;
uint32_t *source;
uint32_t *priority;
uint32_t *enable;
uint32_t threshold;
uint32_t claim;
/* config */
uint32_t num_cpus;
uint32_t num_sources;
uint32_t pending_base;
uint32_t pending_num;
uint32_t source_base;
uint32_t source_num;
uint32_t priority_base;
uint32_t priority_num;
uint32_t enable_base;
uint32_t enable_num;
uint32_t threshold_base;
uint32_t claim_base;
} IbexPlicState;
#endif /* HW_IBEX_PLIC_H */