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linux-headers: Update from v3.14-rc3
Update to tag v3.14-rc3 (6d0abeca3242a88cab8232e4acd7e2bf088f3bc2) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1392687720-26806-2-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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5 changed files with 74 additions and 4 deletions
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@ -119,6 +119,26 @@ struct kvm_arch_memory_slot {
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#define KVM_REG_ARM_32_CRN_MASK 0x0000000000007800
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#define KVM_REG_ARM_32_CRN_SHIFT 11
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#define ARM_CP15_REG_SHIFT_MASK(x,n) \
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(((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK)
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#define __ARM_CP15_REG(op1,crn,crm,op2) \
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(KVM_REG_ARM | (15 << KVM_REG_ARM_COPROC_SHIFT) | \
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ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | \
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ARM_CP15_REG_SHIFT_MASK(crn, 32_CRN) | \
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ARM_CP15_REG_SHIFT_MASK(crm, CRM) | \
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ARM_CP15_REG_SHIFT_MASK(op2, 32_OPC2))
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#define ARM_CP15_REG32(...) (__ARM_CP15_REG(__VA_ARGS__) | KVM_REG_SIZE_U32)
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#define __ARM_CP15_REG64(op1,crm) \
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(__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64)
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#define ARM_CP15_REG64(...) __ARM_CP15_REG64(__VA_ARGS__)
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#define KVM_REG_ARM_TIMER_CTL ARM_CP15_REG32(0, 14, 3, 1)
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#define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14)
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#define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14)
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/* Normal registers are mapped as coprocessor 16. */
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#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT)
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#define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / 4)
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@ -143,6 +163,14 @@ struct kvm_arch_memory_slot {
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#define KVM_REG_ARM_VFP_FPINST 0x1009
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#define KVM_REG_ARM_VFP_FPINST2 0x100A
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/* Device Control API: ARM VGIC */
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#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
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#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1
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#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2
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#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32
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#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
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#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
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#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
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/* KVM_IRQ_LINE irq field index values */
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#define KVM_ARM_IRQ_TYPE_SHIFT 24
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