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tcg: introduce dynamic TLB sizing
Disabled in all TCG backends for now. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Message-Id: <20190116170114.26802-3-cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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12 changed files with 282 additions and 7 deletions
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@ -74,6 +74,187 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > sizeof(run_on_cpu_data));
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QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16);
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#define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1)
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#if TCG_TARGET_IMPLEMENTS_DYN_TLB
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static inline size_t sizeof_tlb(CPUArchState *env, uintptr_t mmu_idx)
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{
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return env->tlb_mask[mmu_idx] + (1 << CPU_TLB_ENTRY_BITS);
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}
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static void tlb_window_reset(CPUTLBWindow *window, int64_t ns,
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size_t max_entries)
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{
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window->begin_ns = ns;
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window->max_entries = max_entries;
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}
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static void tlb_dyn_init(CPUArchState *env)
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{
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int i;
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for (i = 0; i < NB_MMU_MODES; i++) {
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CPUTLBDesc *desc = &env->tlb_d[i];
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size_t n_entries = 1 << CPU_TLB_DYN_DEFAULT_BITS;
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tlb_window_reset(&desc->window, get_clock_realtime(), 0);
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desc->n_used_entries = 0;
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env->tlb_mask[i] = (n_entries - 1) << CPU_TLB_ENTRY_BITS;
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env->tlb_table[i] = g_new(CPUTLBEntry, n_entries);
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env->iotlb[i] = g_new(CPUIOTLBEntry, n_entries);
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}
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}
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/**
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* tlb_mmu_resize_locked() - perform TLB resize bookkeeping; resize if necessary
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* @env: CPU that owns the TLB
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* @mmu_idx: MMU index of the TLB
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*
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* Called with tlb_lock_held.
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*
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* We have two main constraints when resizing a TLB: (1) we only resize it
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* on a TLB flush (otherwise we'd have to take a perf hit by either rehashing
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* the array or unnecessarily flushing it), which means we do not control how
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* frequently the resizing can occur; (2) we don't have access to the guest's
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* future scheduling decisions, and therefore have to decide the magnitude of
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* the resize based on past observations.
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*
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* In general, a memory-hungry process can benefit greatly from an appropriately
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* sized TLB, since a guest TLB miss is very expensive. This doesn't mean that
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* we just have to make the TLB as large as possible; while an oversized TLB
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* results in minimal TLB miss rates, it also takes longer to be flushed
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* (flushes can be _very_ frequent), and the reduced locality can also hurt
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* performance.
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*
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* To achieve near-optimal performance for all kinds of workloads, we:
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*
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* 1. Aggressively increase the size of the TLB when the use rate of the
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* TLB being flushed is high, since it is likely that in the near future this
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* memory-hungry process will execute again, and its memory hungriness will
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* probably be similar.
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*
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* 2. Slowly reduce the size of the TLB as the use rate declines over a
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* reasonably large time window. The rationale is that if in such a time window
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* we have not observed a high TLB use rate, it is likely that we won't observe
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* it in the near future. In that case, once a time window expires we downsize
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* the TLB to match the maximum use rate observed in the window.
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*
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* 3. Try to keep the maximum use rate in a time window in the 30-70% range,
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* since in that range performance is likely near-optimal. Recall that the TLB
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* is direct mapped, so we want the use rate to be low (or at least not too
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* high), since otherwise we are likely to have a significant amount of
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* conflict misses.
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*/
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static void tlb_mmu_resize_locked(CPUArchState *env, int mmu_idx)
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{
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CPUTLBDesc *desc = &env->tlb_d[mmu_idx];
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size_t old_size = tlb_n_entries(env, mmu_idx);
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size_t rate;
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size_t new_size = old_size;
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int64_t now = get_clock_realtime();
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int64_t window_len_ms = 100;
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int64_t window_len_ns = window_len_ms * 1000 * 1000;
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bool window_expired = now > desc->window.begin_ns + window_len_ns;
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if (desc->n_used_entries > desc->window.max_entries) {
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desc->window.max_entries = desc->n_used_entries;
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}
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rate = desc->window.max_entries * 100 / old_size;
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if (rate > 70) {
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new_size = MIN(old_size << 1, 1 << CPU_TLB_DYN_MAX_BITS);
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} else if (rate < 30 && window_expired) {
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size_t ceil = pow2ceil(desc->window.max_entries);
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size_t expected_rate = desc->window.max_entries * 100 / ceil;
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/*
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* Avoid undersizing when the max number of entries seen is just below
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* a pow2. For instance, if max_entries == 1025, the expected use rate
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* would be 1025/2048==50%. However, if max_entries == 1023, we'd get
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* 1023/1024==99.9% use rate, so we'd likely end up doubling the size
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* later. Thus, make sure that the expected use rate remains below 70%.
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* (and since we double the size, that means the lowest rate we'd
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* expect to get is 35%, which is still in the 30-70% range where
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* we consider that the size is appropriate.)
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*/
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if (expected_rate > 70) {
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ceil *= 2;
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}
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new_size = MAX(ceil, 1 << CPU_TLB_DYN_MIN_BITS);
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}
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if (new_size == old_size) {
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if (window_expired) {
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tlb_window_reset(&desc->window, now, desc->n_used_entries);
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}
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return;
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}
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g_free(env->tlb_table[mmu_idx]);
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g_free(env->iotlb[mmu_idx]);
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tlb_window_reset(&desc->window, now, 0);
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/* desc->n_used_entries is cleared by the caller */
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env->tlb_mask[mmu_idx] = (new_size - 1) << CPU_TLB_ENTRY_BITS;
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env->tlb_table[mmu_idx] = g_try_new(CPUTLBEntry, new_size);
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env->iotlb[mmu_idx] = g_try_new(CPUIOTLBEntry, new_size);
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/*
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* If the allocations fail, try smaller sizes. We just freed some
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* memory, so going back to half of new_size has a good chance of working.
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* Increased memory pressure elsewhere in the system might cause the
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* allocations to fail though, so we progressively reduce the allocation
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* size, aborting if we cannot even allocate the smallest TLB we support.
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*/
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while (env->tlb_table[mmu_idx] == NULL || env->iotlb[mmu_idx] == NULL) {
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if (new_size == (1 << CPU_TLB_DYN_MIN_BITS)) {
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error_report("%s: %s", __func__, strerror(errno));
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abort();
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}
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new_size = MAX(new_size >> 1, 1 << CPU_TLB_DYN_MIN_BITS);
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env->tlb_mask[mmu_idx] = (new_size - 1) << CPU_TLB_ENTRY_BITS;
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g_free(env->tlb_table[mmu_idx]);
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g_free(env->iotlb[mmu_idx]);
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env->tlb_table[mmu_idx] = g_try_new(CPUTLBEntry, new_size);
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env->iotlb[mmu_idx] = g_try_new(CPUIOTLBEntry, new_size);
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}
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}
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static inline void tlb_table_flush_by_mmuidx(CPUArchState *env, int mmu_idx)
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{
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tlb_mmu_resize_locked(env, mmu_idx);
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memset(env->tlb_table[mmu_idx], -1, sizeof_tlb(env, mmu_idx));
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env->tlb_d[mmu_idx].n_used_entries = 0;
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}
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static inline void tlb_n_used_entries_inc(CPUArchState *env, uintptr_t mmu_idx)
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{
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env->tlb_d[mmu_idx].n_used_entries++;
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}
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static inline void tlb_n_used_entries_dec(CPUArchState *env, uintptr_t mmu_idx)
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{
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env->tlb_d[mmu_idx].n_used_entries--;
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}
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#else /* !TCG_TARGET_IMPLEMENTS_DYN_TLB */
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static inline void tlb_dyn_init(CPUArchState *env)
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{
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}
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static inline void tlb_table_flush_by_mmuidx(CPUArchState *env, int mmu_idx)
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{
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memset(env->tlb_table[mmu_idx], -1, sizeof(env->tlb_table[0]));
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}
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static inline void tlb_n_used_entries_inc(CPUArchState *env, uintptr_t mmu_idx)
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{
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}
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static inline void tlb_n_used_entries_dec(CPUArchState *env, uintptr_t mmu_idx)
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{
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}
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#endif /* TCG_TARGET_IMPLEMENTS_DYN_TLB */
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void tlb_init(CPUState *cpu)
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{
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CPUArchState *env = cpu->env_ptr;
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@ -82,6 +263,8 @@ void tlb_init(CPUState *cpu)
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/* Ensure that cpu_reset performs a full flush. */
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env->tlb_c.dirty = ALL_MMUIDX_BITS;
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tlb_dyn_init(env);
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}
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/* flush_all_helper: run fn across all cpus
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@ -122,7 +305,7 @@ void tlb_flush_counts(size_t *pfull, size_t *ppart, size_t *pelide)
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static void tlb_flush_one_mmuidx_locked(CPUArchState *env, int mmu_idx)
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{
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memset(env->tlb_table[mmu_idx], -1, sizeof(env->tlb_table[0]));
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tlb_table_flush_by_mmuidx(env, mmu_idx);
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memset(env->tlb_v_table[mmu_idx], -1, sizeof(env->tlb_v_table[0]));
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env->tlb_d[mmu_idx].large_page_addr = -1;
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env->tlb_d[mmu_idx].large_page_mask = -1;
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@ -234,12 +417,14 @@ static inline bool tlb_entry_is_empty(const CPUTLBEntry *te)
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}
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/* Called with tlb_c.lock held */
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static inline void tlb_flush_entry_locked(CPUTLBEntry *tlb_entry,
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static inline bool tlb_flush_entry_locked(CPUTLBEntry *tlb_entry,
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target_ulong page)
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{
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if (tlb_hit_page_anyprot(tlb_entry, page)) {
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memset(tlb_entry, -1, sizeof(*tlb_entry));
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return true;
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}
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return false;
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}
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/* Called with tlb_c.lock held */
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@ -250,7 +435,9 @@ static inline void tlb_flush_vtlb_page_locked(CPUArchState *env, int mmu_idx,
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assert_cpu_is_self(ENV_GET_CPU(env));
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for (k = 0; k < CPU_VTLB_SIZE; k++) {
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tlb_flush_entry_locked(&env->tlb_v_table[mmu_idx][k], page);
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if (tlb_flush_entry_locked(&env->tlb_v_table[mmu_idx][k], page)) {
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tlb_n_used_entries_dec(env, mmu_idx);
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}
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}
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}
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@ -267,7 +454,9 @@ static void tlb_flush_page_locked(CPUArchState *env, int midx,
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midx, lp_addr, lp_mask);
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tlb_flush_one_mmuidx_locked(env, midx);
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} else {
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tlb_flush_entry_locked(tlb_entry(env, midx, page), page);
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if (tlb_flush_entry_locked(tlb_entry(env, midx, page), page)) {
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tlb_n_used_entries_dec(env, midx);
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}
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tlb_flush_vtlb_page_locked(env, midx, page);
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}
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}
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qemu_spin_lock(&env->tlb_c.lock);
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for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
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unsigned int i;
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unsigned int n = tlb_n_entries(env, mmu_idx);
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for (i = 0; i < CPU_TLB_SIZE; i++) {
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for (i = 0; i < n; i++) {
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tlb_reset_dirty_range_locked(&env->tlb_table[mmu_idx][i], start1,
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length);
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}
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/* Evict the old entry into the victim tlb. */
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copy_tlb_helper_locked(tv, te);
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env->iotlb_v[mmu_idx][vidx] = env->iotlb[mmu_idx][index];
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tlb_n_used_entries_dec(env, mmu_idx);
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}
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/* refill the tlb */
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}
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copy_tlb_helper_locked(te, &tn);
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tlb_n_used_entries_inc(env, mmu_idx);
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qemu_spin_unlock(&env->tlb_c.lock);
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}
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