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Merge remote-tracking branch 'pmaydell/tcg-aarch64.next' into staging
# By Claudio Fontana (9) and others # Via Peter Maydell * pmaydell/tcg-aarch64.next: MAINTAINERS: add tcg/aarch64 maintainer configure: permit compilation on arm aarch64 tcg/aarch64: implement user mode qemu ld/st user-exec.c: aarch64 initial implementation of cpu_signal_handler tcg/aarch64: implement sign/zero extend operations tcg/aarch64: implement byte swap operations tcg/aarch64: implement AND/TEST immediate pattern tcg/aarch64: improve arith shifted regs operations tcg/aarch64: implement new TCG target for aarch64 include/elf.h: add aarch64 ELF machine and relocs configure: Drop CONFIG_ATFILE test linux-user: Drop direct use of openat etc syscalls linux-user: Allow getdents to be provided by getdents64 Message-id: 1371052645-9006-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
commit
86a6a07745
9 changed files with 1752 additions and 223 deletions
129
include/elf.h
129
include/elf.h
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@ -129,6 +129,8 @@ typedef int64_t Elf64_Sxword;
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#define EM_XTENSA 94 /* Tensilica Xtensa */
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#define EM_AARCH64 183
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/* This is the info that is needed to parse the dynamic section of the file */
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#define DT_NULL 0
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#define DT_NEEDED 1
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@ -616,6 +618,133 @@ typedef struct {
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/* Keep this the last entry. */
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#define R_ARM_NUM 256
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/* ARM Aarch64 relocation types */
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#define R_AARCH64_NONE 256 /* also accepts R_ARM_NONE (0) */
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/* static data relocations */
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#define R_AARCH64_ABS64 257
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#define R_AARCH64_ABS32 258
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#define R_AARCH64_ABS16 259
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#define R_AARCH64_PREL64 260
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#define R_AARCH64_PREL32 261
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#define R_AARCH64_PREL16 262
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/* static aarch64 group relocations */
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/* group relocs to create unsigned data value or address inline */
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#define R_AARCH64_MOVW_UABS_G0 263
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#define R_AARCH64_MOVW_UABS_G0_NC 264
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#define R_AARCH64_MOVW_UABS_G1 265
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#define R_AARCH64_MOVW_UABS_G1_NC 266
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#define R_AARCH64_MOVW_UABS_G2 267
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#define R_AARCH64_MOVW_UABS_G2_NC 268
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#define R_AARCH64_MOVW_UABS_G3 269
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/* group relocs to create signed data or offset value inline */
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#define R_AARCH64_MOVW_SABS_G0 270
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#define R_AARCH64_MOVW_SABS_G1 271
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#define R_AARCH64_MOVW_SABS_G2 272
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/* relocs to generate 19, 21, and 33 bit PC-relative addresses */
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#define R_AARCH64_LD_PREL_LO19 273
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#define R_AARCH64_ADR_PREL_LO21 274
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#define R_AARCH64_ADR_PREL_PG_HI21 275
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#define R_AARCH64_ADR_PREL_PG_HI21_NC 276
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#define R_AARCH64_ADD_ABS_LO12_NC 277
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#define R_AARCH64_LDST8_ABS_LO12_NC 278
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#define R_AARCH64_LDST16_ABS_LO12_NC 284
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#define R_AARCH64_LDST32_ABS_LO12_NC 285
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#define R_AARCH64_LDST64_ABS_LO12_NC 286
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#define R_AARCH64_LDST128_ABS_LO12_NC 299
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/* relocs for control-flow - all offsets as multiple of 4 */
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#define R_AARCH64_TSTBR14 279
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#define R_AARCH64_CONDBR19 280
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#define R_AARCH64_JUMP26 282
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#define R_AARCH64_CALL26 283
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/* group relocs to create pc-relative offset inline */
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#define R_AARCH64_MOVW_PREL_G0 287
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#define R_AARCH64_MOVW_PREL_G0_NC 288
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#define R_AARCH64_MOVW_PREL_G1 289
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#define R_AARCH64_MOVW_PREL_G1_NC 290
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#define R_AARCH64_MOVW_PREL_G2 291
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#define R_AARCH64_MOVW_PREL_G2_NC 292
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#define R_AARCH64_MOVW_PREL_G3 293
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/* group relocs to create a GOT-relative offset inline */
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#define R_AARCH64_MOVW_GOTOFF_G0 300
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#define R_AARCH64_MOVW_GOTOFF_G0_NC 301
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#define R_AARCH64_MOVW_GOTOFF_G1 302
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#define R_AARCH64_MOVW_GOTOFF_G1_NC 303
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#define R_AARCH64_MOVW_GOTOFF_G2 304
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#define R_AARCH64_MOVW_GOTOFF_G2_NC 305
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#define R_AARCH64_MOVW_GOTOFF_G3 306
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/* GOT-relative data relocs */
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#define R_AARCH64_GOTREL64 307
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#define R_AARCH64_GOTREL32 308
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/* GOT-relative instr relocs */
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#define R_AARCH64_GOT_LD_PREL19 309
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#define R_AARCH64_LD64_GOTOFF_LO15 310
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#define R_AARCH64_ADR_GOT_PAGE 311
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#define R_AARCH64_LD64_GOT_LO12_NC 312
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#define R_AARCH64_LD64_GOTPAGE_LO15 313
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/* General Dynamic TLS relocations */
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#define R_AARCH64_TLSGD_ADR_PREL21 512
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#define R_AARCH64_TLSGD_ADR_PAGE21 513
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#define R_AARCH64_TLSGD_ADD_LO12_NC 514
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#define R_AARCH64_TLSGD_MOVW_G1 515
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#define R_AARCH64_TLSGD_MOVW_G0_NC 516
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/* Local Dynamic TLS relocations */
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#define R_AARCH64_TLSLD_ADR_PREL21 517
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#define R_AARCH64_TLSLD_ADR_PAGE21 518
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#define R_AARCH64_TLSLD_ADD_LO12_NC 519
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#define R_AARCH64_TLSLD_MOVW_G1 520
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#define R_AARCH64_TLSLD_MOVW_G0_NC 521
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#define R_AARCH64_TLSLD_LD_PREL19 522
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#define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523
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#define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524
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#define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525
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#define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526
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#define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527
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#define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528
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#define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529
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#define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530
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#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531
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#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532
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#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533
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#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534
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#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535
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#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536
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#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537
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#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538
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/* initial exec TLS relocations */
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#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539
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#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540
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#define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541
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#define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542
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#define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543
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/* local exec TLS relocations */
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#define R_AARCH64_TLSLE_MOVW_TPREL_G2 544
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#define R_AARCH64_TLSLE_MOVW_TPREL_G1 545
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#define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546
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#define R_AARCH64_TLSLE_MOVW_TPREL_G0 547
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#define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548
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#define R_AARCH64_TLSLE_ADD_TPREL_HI12 549
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#define R_AARCH64_TLSLE_ADD_TPREL_LO12 550
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#define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551
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#define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552
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#define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553
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#define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554
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#define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555
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#define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556
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#define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557
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#define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558
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#define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559
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/* Dynamic Relocations */
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#define R_AARCH64_COPY 1024
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#define R_AARCH64_GLOB_DAT 1025
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#define R_AARCH64_JUMP_SLOT 1026
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#define R_AARCH64_RELATIVE 1027
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#define R_AARCH64_TLS_DTPREL64 1028
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#define R_AARCH64_TLS_DTPMOD64 1029
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#define R_AARCH64_TLS_TPREL64 1030
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#define R_AARCH64_TLS_DTPREL32 1031
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#define R_AARCH64_TLS_DTPMOD32 1032
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#define R_AARCH64_TLS_TPREL32 1033
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/* s390 relocations defined by the ABIs */
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#define R_390_NONE 0 /* No reloc. */
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#define R_390_8 1 /* Direct 8 bit. */
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@ -128,7 +128,7 @@ static inline void tlb_flush(CPUArchState *env, int flush_global)
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#if defined(__arm__) || defined(_ARCH_PPC) \
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|| defined(__x86_64__) || defined(__i386__) \
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|| defined(__sparc__) \
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|| defined(__sparc__) || defined(__aarch64__) \
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|| defined(CONFIG_TCG_INTERPRETER)
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#define USE_DIRECT_JUMP
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#endif
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@ -230,6 +230,9 @@ static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
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*(uint32_t *)jmp_addr = addr - (jmp_addr + 4);
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/* no need to flush icache explicitly */
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}
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#elif defined(__aarch64__)
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void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr);
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#define tb_set_jmp_target1 aarch64_tb_set_jmp_target
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#elif defined(__arm__)
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static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
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{
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