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target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr

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We will require the context to handle RV64 word operations.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210823195529.560295-5-richard.henderson@linaro.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Richard Henderson 2021-08-23 12:55:09 -07:00 • committed by Alistair Francis
parent 4a083b563a
commit 867c81968a
9 changed files with 144 additions and 144 deletions
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52
target/riscv/insn_trans/trans_rvh.c.inc
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@ -37,10 +37,10 @@ static bool trans_hlv_b(DisasContext *ctx, arg_hlv_b *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(ctx, t0, a->rs1);
tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_SB);
gen_set_gpr(a->rd, t1);
gen_set_gpr(ctx, a->rd, t1);
tcg_temp_free(t0);
tcg_temp_free(t1);
@ -59,10 +59,10 @@ static bool trans_hlv_h(DisasContext *ctx, arg_hlv_h *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(ctx, t0, a->rs1);
tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_TESW);
gen_set_gpr(a->rd, t1);
gen_set_gpr(ctx, a->rd, t1);
tcg_temp_free(t0);
tcg_temp_free(t1);
@ -81,10 +81,10 @@ static bool trans_hlv_w(DisasContext *ctx, arg_hlv_w *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(ctx, t0, a->rs1);
tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_TESL);
gen_set_gpr(a->rd, t1);
gen_set_gpr(ctx, a->rd, t1);
tcg_temp_free(t0);
tcg_temp_free(t1);
@ -103,10 +103,10 @@ static bool trans_hlv_bu(DisasContext *ctx, arg_hlv_bu *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(ctx, t0, a->rs1);
tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_UB);
gen_set_gpr(a->rd, t1);
gen_set_gpr(ctx, a->rd, t1);
tcg_temp_free(t0);
tcg_temp_free(t1);
@ -125,9 +125,9 @@ static bool trans_hlv_hu(DisasContext *ctx, arg_hlv_hu *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(ctx, t0, a->rs1);
tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_TEUW);
gen_set_gpr(a->rd, t1);
gen_set_gpr(ctx, a->rd, t1);
tcg_temp_free(t0);
tcg_temp_free(t1);
@ -146,8 +146,8 @@ static bool trans_hsv_b(DisasContext *ctx, arg_hsv_b *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(dat, a->rs2);
gen_get_gpr(ctx, t0, a->rs1);
gen_get_gpr(ctx, dat, a->rs2);
tcg_gen_qemu_st_tl(dat, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_SB);
@ -168,8 +168,8 @@ static bool trans_hsv_h(DisasContext *ctx, arg_hsv_h *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(dat, a->rs2);
gen_get_gpr(ctx, t0, a->rs1);
gen_get_gpr(ctx, dat, a->rs2);
tcg_gen_qemu_st_tl(dat, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_TESW);
@ -190,8 +190,8 @@ static bool trans_hsv_w(DisasContext *ctx, arg_hsv_w *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(dat, a->rs2);
gen_get_gpr(ctx, t0, a->rs1);
gen_get_gpr(ctx, dat, a->rs2);
tcg_gen_qemu_st_tl(dat, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_TESL);
@ -214,10 +214,10 @@ static bool trans_hlv_wu(DisasContext *ctx, arg_hlv_wu *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(ctx, t0, a->rs1);
tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_TEUL);
gen_set_gpr(a->rd, t1);
gen_set_gpr(ctx, a->rd, t1);
tcg_temp_free(t0);
tcg_temp_free(t1);
@ -238,10 +238,10 @@ static bool trans_hlv_d(DisasContext *ctx, arg_hlv_d *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(ctx, t0, a->rs1);
tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_TEQ);
gen_set_gpr(a->rd, t1);
gen_set_gpr(ctx, a->rd, t1);
tcg_temp_free(t0);
tcg_temp_free(t1);
@ -262,8 +262,8 @@ static bool trans_hsv_d(DisasContext *ctx, arg_hsv_d *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(dat, a->rs2);
gen_get_gpr(ctx, t0, a->rs1);
gen_get_gpr(ctx, dat, a->rs2);
tcg_gen_qemu_st_tl(dat, t0, ctx->mem_idx | TB_FLAGS_PRIV_HYP_ACCESS_MASK, MO_TEQ);
@ -284,10 +284,10 @@ static bool trans_hlvx_hu(DisasContext *ctx, arg_hlvx_hu *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(ctx, t0, a->rs1);
gen_helper_hyp_hlvx_hu(t1, cpu_env, t0);
gen_set_gpr(a->rd, t1);
gen_set_gpr(ctx, a->rd, t1);
tcg_temp_free(t0);
tcg_temp_free(t1);
@ -306,10 +306,10 @@ static bool trans_hlvx_wu(DisasContext *ctx, arg_hlvx_wu *a)
check_access(ctx);
gen_get_gpr(t0, a->rs1);
gen_get_gpr(ctx, t0, a->rs1);
gen_helper_hyp_hlvx_wu(t1, cpu_env, t0);
gen_set_gpr(a->rd, t1);
gen_set_gpr(ctx, a->rd, t1);
tcg_temp_free(t0);
tcg_temp_free(t1);