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Bugfixes for 6.2.
-----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmGXb2kUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroNkQggArLP8V1vL9XW9LJ6v4UdO4dp78MRb mP5zZhzY6CZ9NnbLW3rtS8GLrQ7XJdHl4huVIckIF3HW+TOBas2gXOiyWdskZRFS UGSoeejj2RHmTzBKWZN77G/GB0ElyKt3wvXeCEx0F8yiJXZhkw6n6tp3U/lGnic3 sJmniTBZ+m3GGtrAaEL11x8ITdtdGEE4uIhspqN8X0kU+WkSsklm8+GAORzMpWGq Fqo46dd1C+st1GvbDOnghltYOEPPyKE6pZYOnZwB8X8hi01Ex53wXBXl98G8r8rt qA6P0lc5Eh8E3M7xm+kJBw1XNSkxjQioJ1SElmQFW5w5rVtYVSDEsaL4MQ== =3kjz -----END PGP SIGNATURE----- Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging Bugfixes for 6.2. # gpg: Signature made Fri 19 Nov 2021 10:33:29 AM CET # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: chardev/wctable: don't free the instance in wctablet_chr_finalize meson.build: Support ncurses on MacOS and OpenBSD docs: Spell QEMU all caps qtest/am53c974-test: add test for reset before transfer esp: ensure that async_len is reset to 0 during esp_hard_reset() nvmm: Fix support for stable version meson: fix botched compile check conversions Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
commit
8627edfb3f
16 changed files with 93 additions and 42 deletions
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@ -15,7 +15,7 @@ These are specified using a special URL syntax.
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'iqn.2008-11.org.linux-kvm[:<name>]' but this can also be set from
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the command line or a configuration file.
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Since version Qemu 2.4 it is possible to specify a iSCSI request
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Since version QEMU 2.4 it is possible to specify a iSCSI request
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timeout to detect stalled requests and force a reestablishment of the
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session. The timeout is specified in seconds. The default is 0 which
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means no timeout. Libiscsi 1.15.0 or greater is required for this
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@ -20,13 +20,13 @@ report the same CPUID info to guest as on host for most of SGX CPUID. With
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reporting the same CPUID guest is able to use full capacity of SGX, and KVM
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doesn't need to emulate those info.
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The guest's EPC base and size are determined by Qemu, and KVM needs Qemu to
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The guest's EPC base and size are determined by QEMU, and KVM needs QEMU to
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notify such info to it before it can initialize SGX for guest.
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Virtual EPC
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~~~~~~~~~~~
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By default, Qemu does not assign EPC to a VM, i.e. fully enabling SGX in a VM
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By default, QEMU does not assign EPC to a VM, i.e. fully enabling SGX in a VM
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requires explicit allocation of EPC to the VM. Similar to other specialized
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memory types, e.g. hugetlbfs, EPC is exposed as a memory backend.
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@ -35,12 +35,12 @@ prior to realizing the vCPUs themselves, which occurs long before generic
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devices are parsed and realized. This limitation means that EPC does not
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require -maxmem as EPC is not treated as {cold,hot}plugged memory.
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Qemu does not artificially restrict the number of EPC sections exposed to a
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guest, e.g. Qemu will happily allow you to create 64 1M EPC sections. Be aware
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QEMU does not artificially restrict the number of EPC sections exposed to a
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guest, e.g. QEMU will happily allow you to create 64 1M EPC sections. Be aware
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that some kernels may not recognize all EPC sections, e.g. the Linux SGX driver
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is hardwired to support only 8 EPC sections.
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The following Qemu snippet creates two EPC sections, with 64M pre-allocated
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The following QEMU snippet creates two EPC sections, with 64M pre-allocated
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to the VM and an additional 28M mapped but not allocated::
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-object memory-backend-epc,id=mem1,size=64M,prealloc=on \
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@ -54,7 +54,7 @@ to physical EPC. Because physical EPC is protected via range registers,
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the size of the physical EPC must be a power of two (though software sees
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a subset of the full EPC, e.g. 92M or 128M) and the EPC must be naturally
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aligned. KVM SGX's virtual EPC is purely a software construct and only
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requires the size and location to be page aligned. Qemu enforces the EPC
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requires the size and location to be page aligned. QEMU enforces the EPC
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size is a multiple of 4k and will ensure the base of the EPC is 4k aligned.
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To simplify the implementation, EPC is always located above 4g in the guest
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physical address space.
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@ -62,7 +62,7 @@ physical address space.
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Migration
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~~~~~~~~~
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Qemu/KVM doesn't prevent live migrating SGX VMs, although from hardware's
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QEMU/KVM doesn't prevent live migrating SGX VMs, although from hardware's
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perspective, SGX doesn't support live migration, since both EPC and the SGX
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key hierarchy are bound to the physical platform. However live migration
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can be supported in the sense if guest software stack can support recreating
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@ -76,7 +76,7 @@ CPUID
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~~~~~
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Due to its myriad dependencies, SGX is currently not listed as supported
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in any of Qemu's built-in CPU configuration. To expose SGX (and SGX Launch
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in any of QEMU's built-in CPU configuration. To expose SGX (and SGX Launch
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Control) to a guest, you must either use ``-cpu host`` to pass-through the
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host CPU model, or explicitly enable SGX when using a built-in CPU model,
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e.g. via ``-cpu <model>,+sgx`` or ``-cpu <model>,+sgx,+sgxlc``.
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@ -101,7 +101,7 @@ controlled via -cpu are prefixed with "sgx", e.g.::
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sgx2
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sgxlc
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The following Qemu snippet passes through the host CPU but restricts access to
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The following QEMU snippet passes through the host CPU but restricts access to
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the provision and EINIT token keys::
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-cpu host,-sgx-provisionkey,-sgx-tokenkey
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@ -112,11 +112,11 @@ in hardware cannot be forced on via '-cpu'.
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Virtualize SGX Launch Control
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Qemu SGX support for Launch Control (LC) is passive, in the sense that it
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does not actively change the LC configuration. Qemu SGX provides the user
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QEMU SGX support for Launch Control (LC) is passive, in the sense that it
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does not actively change the LC configuration. QEMU SGX provides the user
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the ability to set/clear the CPUID flag (and by extension the associated
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IA32_FEATURE_CONTROL MSR bit in fw_cfg) and saves/restores the LE Hash MSRs
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when getting/putting guest state, but Qemu does not add new controls to
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when getting/putting guest state, but QEMU does not add new controls to
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directly modify the LC configuration. Similar to hardware behavior, locking
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the LC configuration to a non-Intel value is left to guest firmware. Unlike
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host bios setting for SGX launch control(LC), there is no special bios setting
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@ -126,7 +126,7 @@ creating VM with SGX.
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Feature Control
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~~~~~~~~~~~~~~~
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Qemu SGX updates the ``etc/msr_feature_control`` fw_cfg entry to set the SGX
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QEMU SGX updates the ``etc/msr_feature_control`` fw_cfg entry to set the SGX
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(bit 18) and SGX LC (bit 17) flags based on their respective CPUID support,
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i.e. existing guest firmware will automatically set SGX and SGX LC accordingly,
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assuming said firmware supports fw_cfg.msr_feature_control.
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