mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-03 07:43:54 -06:00
hw/riscv/riscv-iommu: Remove definition of RISCVIOMMU[Pci|Sys]Class
RISCVIOMMUPciClass and RISCVIOMMUSysClass are defined with missed parent class, class_init on them may corrupt their parent class fields. It's lucky that parent_realize and parent_phases are not initialized or used until now, so just remove the definitions. They can be added back when really necessary. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250606092406.229833-6-zhenzhong.duan@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
parent
2f8f01ae3d
commit
860bb8b925
3 changed files with 2 additions and 16 deletions
|
@ -68,12 +68,6 @@ typedef struct RISCVIOMMUStatePci {
|
||||||
RISCVIOMMUState iommu; /* common IOMMU state */
|
RISCVIOMMUState iommu; /* common IOMMU state */
|
||||||
} RISCVIOMMUStatePci;
|
} RISCVIOMMUStatePci;
|
||||||
|
|
||||||
struct RISCVIOMMUPciClass {
|
|
||||||
/*< public >*/
|
|
||||||
DeviceRealize parent_realize;
|
|
||||||
ResettablePhases parent_phases;
|
|
||||||
};
|
|
||||||
|
|
||||||
/* interrupt delivery callback */
|
/* interrupt delivery callback */
|
||||||
static void riscv_iommu_pci_notify(RISCVIOMMUState *iommu, unsigned vector)
|
static void riscv_iommu_pci_notify(RISCVIOMMUState *iommu, unsigned vector)
|
||||||
{
|
{
|
||||||
|
|
|
@ -53,12 +53,6 @@ struct RISCVIOMMUStateSys {
|
||||||
uint8_t *msix_pba;
|
uint8_t *msix_pba;
|
||||||
};
|
};
|
||||||
|
|
||||||
struct RISCVIOMMUSysClass {
|
|
||||||
/*< public >*/
|
|
||||||
DeviceRealize parent_realize;
|
|
||||||
ResettablePhases parent_phases;
|
|
||||||
};
|
|
||||||
|
|
||||||
static uint64_t msix_table_mmio_read(void *opaque, hwaddr addr,
|
static uint64_t msix_table_mmio_read(void *opaque, hwaddr addr,
|
||||||
unsigned size)
|
unsigned size)
|
||||||
{
|
{
|
||||||
|
|
|
@ -30,14 +30,12 @@ typedef struct RISCVIOMMUState RISCVIOMMUState;
|
||||||
typedef struct RISCVIOMMUSpace RISCVIOMMUSpace;
|
typedef struct RISCVIOMMUSpace RISCVIOMMUSpace;
|
||||||
|
|
||||||
#define TYPE_RISCV_IOMMU_PCI "riscv-iommu-pci"
|
#define TYPE_RISCV_IOMMU_PCI "riscv-iommu-pci"
|
||||||
OBJECT_DECLARE_TYPE(RISCVIOMMUStatePci, RISCVIOMMUPciClass, RISCV_IOMMU_PCI)
|
OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUStatePci, RISCV_IOMMU_PCI)
|
||||||
typedef struct RISCVIOMMUStatePci RISCVIOMMUStatePci;
|
typedef struct RISCVIOMMUStatePci RISCVIOMMUStatePci;
|
||||||
typedef struct RISCVIOMMUPciClass RISCVIOMMUPciClass;
|
|
||||||
|
|
||||||
#define TYPE_RISCV_IOMMU_SYS "riscv-iommu-device"
|
#define TYPE_RISCV_IOMMU_SYS "riscv-iommu-device"
|
||||||
OBJECT_DECLARE_TYPE(RISCVIOMMUStateSys, RISCVIOMMUSysClass, RISCV_IOMMU_SYS)
|
OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUStateSys, RISCV_IOMMU_SYS)
|
||||||
typedef struct RISCVIOMMUStateSys RISCVIOMMUStateSys;
|
typedef struct RISCVIOMMUStateSys RISCVIOMMUStateSys;
|
||||||
typedef struct RISCVIOMMUSysClass RISCVIOMMUSysClass;
|
|
||||||
|
|
||||||
#define FDT_IRQ_TYPE_EDGE_LOW 1
|
#define FDT_IRQ_TYPE_EDGE_LOW 1
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue