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target/microblaze: Fix width of FSR

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The exception status register is only 32-bits wide.  Do not use a
64-bit type to represent it.  Since cpu_fsr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2020-08-19 22:40:23 -07:00
parent 6efd55995a
commit 86017ccfbd
2 changed files with 6 additions and 7 deletions
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target/microblaze/cpu.h
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@ -240,7 +240,7 @@ struct CPUMBState {
uint32_t msr;
uint64_t ear;
uint32_t esr;
uint64_t fsr;
uint32_t fsr;
uint64_t btr;
uint64_t edr;
float_status fp_status;