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hw/intc: If mmsiaddrcfgh.L == 1, smsiaddrcfg and smsiaddrcfgh are read-only.

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According to the `The RISC-V Advanced Interrupt Architecture`
document, if register `mmsiaddrcfgh` of the domain has bit L set
to one, then `smsiaddrcfg` and `smsiaddrcfgh` are locked as
read-only alongside `mmsiaddrcfg` and `mmsiaddrcfgh`.

Signed-off-by: Tommy Wu <tommy.wu@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Message-Id: <20230609055936.3925438-1-tommy.wu@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Tommy Wu 2023-06-08 22:59:33 -07:00 • committed by Alistair Francis
parent a574b27af4
commit 860029321d
1 changed files with 2 additions and 2 deletions
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4
hw/intc/riscv_aplic.c
View file

@ -688,13 +688,13 @@ static void riscv_aplic_write(void *opaque, hwaddr addr, uint64_t value,
* domains). * domains).
*/ */
if (aplic->num_children && if (aplic->num_children &&
!(aplic->smsicfgaddrH & APLIC_xMSICFGADDRH_L)) { !(aplic->mmsicfgaddrH & APLIC_xMSICFGADDRH_L)) {
aplic->smsicfgaddr = value; aplic->smsicfgaddr = value;
} }
} else if (aplic->mmode && aplic->msimode && } else if (aplic->mmode && aplic->msimode &&
(addr == APLIC_SMSICFGADDRH)) { (addr == APLIC_SMSICFGADDRH)) {
if (aplic->num_children && if (aplic->num_children &&
!(aplic->smsicfgaddrH & APLIC_xMSICFGADDRH_L)) { !(aplic->mmsicfgaddrH & APLIC_xMSICFGADDRH_L)) {
aplic->smsicfgaddrH = value & APLIC_xMSICFGADDRH_VALID_MASK; aplic->smsicfgaddrH = value & APLIC_xMSICFGADDRH_VALID_MASK;
} }
} else if ((APLIC_SETIP_BASE <= addr) && } else if ((APLIC_SETIP_BASE <= addr) &&