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target/arm: Copy guarded bit in combine_cacheattrs

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The guarded bit comes from the stage1 walk.

Fixes: Coverity CID 1507929
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230407185149.3253946-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2023-04-07 11:51:49 -07:00 • committed by Peter Maydell
parent 6a3b1e440b
commit 8539dc0055
1 changed files with 1 additions and 0 deletions
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target/arm/ptw.c
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@ -2576,6 +2576,7 @@ static ARMCacheAttrs combine_cacheattrs(uint64_t hcr,
assert(!s1.is_s2_format);
ret.is_s2_format = false;
ret.guarded = s1.guarded;
if (s1.attrs == 0xf0) {
tagged = true;