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target/arm: Allow cpu to configure GM blocksize

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Previously we hard-coded the blocksize with GMID_EL1_BS.
But the value we choose for -cpu max does not match the
value that cortex-a710 uses.

Mirror the way we handle dcz_blocksize.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230811214031.171020-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2023-08-31 09:45:14 +01:00 • committed by Peter Maydell
parent ae4acc696f
commit 851ec6eba5
7 changed files with 45 additions and 28 deletions
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2
target/arm/cpu.h
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@ -1075,6 +1075,8 @@ struct ArchCPU {
/* DCZ blocksize, in log_2(words), ie low 4 bits of DCZID_EL0 */
uint8_t dcz_blocksize;
/* GM blocksize, in log_2(words), ie low 4 bits of GMID_EL0 */
uint8_t gm_blocksize;
uint64_t rvbar_prop; /* Property/input signals. */