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hw/timer/exynos4210_rtc.c: Switch main ptimer to transaction-based API

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Switch the exynos41210_rtc main ptimer over to the transaction-based
API, completing the transition for this device.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20191008171740.9679-17-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2019-10-08 18:17:35 +01:00
parent 2dd20308f7
commit 82c7f5faef
1 changed files with 8 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

12
hw/timer/exynos4210_rtc.c
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@ -28,7 +28,6 @@
#include "qemu/osdep.h" #include "qemu/osdep.h"
#include "qemu-common.h" #include "qemu-common.h"
#include "qemu/log.h" #include "qemu/log.h"
#include "qemu/main-loop.h"
#include "qemu/module.h" #include "qemu/module.h"
#include "hw/sysbus.h" #include "hw/sysbus.h"
#include "migration/vmstate.h" #include "migration/vmstate.h"
@ -195,6 +194,7 @@ static void check_alarm_raise(Exynos4210RTCState *s)
* RTC update frequency * RTC update frequency
* Parameters: * Parameters:
* reg_value - current RTCCON register or his new value * reg_value - current RTCCON register or his new value
* Must be called within a ptimer_transaction_begin/commit block for s->ptimer.
*/ */
static void exynos4210_rtc_update_freq(Exynos4210RTCState *s, static void exynos4210_rtc_update_freq(Exynos4210RTCState *s,
uint32_t reg_value) uint32_t reg_value)
@ -402,6 +402,7 @@ static void exynos4210_rtc_write(void *opaque, hwaddr offset,
break; break;
case RTCCON: case RTCCON:
ptimer_transaction_begin(s->ptimer_1Hz); ptimer_transaction_begin(s->ptimer_1Hz);
ptimer_transaction_begin(s->ptimer);
if (value & RTC_ENABLE) { if (value & RTC_ENABLE) {
exynos4210_rtc_update_freq(s, value); exynos4210_rtc_update_freq(s, value);
} }
@ -432,6 +433,7 @@ static void exynos4210_rtc_write(void *opaque, hwaddr offset,
} }
} }
ptimer_transaction_commit(s->ptimer_1Hz); ptimer_transaction_commit(s->ptimer_1Hz);
ptimer_transaction_commit(s->ptimer);
s->reg_rtccon = value; s->reg_rtccon = value;
break; break;
case TICCNT: case TICCNT:
@ -539,8 +541,10 @@ static void exynos4210_rtc_reset(DeviceState *d)
s->reg_curticcnt = 0; s->reg_curticcnt = 0;
ptimer_transaction_begin(s->ptimer);
exynos4210_rtc_update_freq(s, s->reg_rtccon); exynos4210_rtc_update_freq(s, s->reg_rtccon);
ptimer_stop(s->ptimer); ptimer_stop(s->ptimer);
ptimer_transaction_commit(s->ptimer);
ptimer_transaction_begin(s->ptimer_1Hz); ptimer_transaction_begin(s->ptimer_1Hz);
ptimer_stop(s->ptimer_1Hz); ptimer_stop(s->ptimer_1Hz);
ptimer_transaction_commit(s->ptimer_1Hz); ptimer_transaction_commit(s->ptimer_1Hz);
@ -559,12 +563,12 @@ static void exynos4210_rtc_init(Object *obj)
{ {
Exynos4210RTCState *s = EXYNOS4210_RTC(obj); Exynos4210RTCState *s = EXYNOS4210_RTC(obj);
SysBusDevice *dev = SYS_BUS_DEVICE(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj);
QEMUBH *bh;
bh = qemu_bh_new(exynos4210_rtc_tick, s); s->ptimer = ptimer_init(exynos4210_rtc_tick, s, PTIMER_POLICY_DEFAULT);
s->ptimer = ptimer_init_with_bh(bh, PTIMER_POLICY_DEFAULT); ptimer_transaction_begin(s->ptimer);
ptimer_set_freq(s->ptimer, RTC_BASE_FREQ); ptimer_set_freq(s->ptimer, RTC_BASE_FREQ);
exynos4210_rtc_update_freq(s, 0); exynos4210_rtc_update_freq(s, 0);
ptimer_transaction_commit(s->ptimer);
s->ptimer_1Hz = ptimer_init(exynos4210_rtc_1Hz_tick, s->ptimer_1Hz = ptimer_init(exynos4210_rtc_1Hz_tick,
s, PTIMER_POLICY_DEFAULT); s, PTIMER_POLICY_DEFAULT);