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hw/arm/stm32f405: correctly describe the memory layout
STM32F405 has 128K of SRAM and another 64K of CCM (Core-coupled Memory) at a different base address. Correctly describe the memory layout to give existing FW images a chance to run unmodified. Reviewed-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Felipe Balbi <balbi@kernel.org> Message-id: 20221230145733.200496-2-balbi@kernel.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2 changed files with 12 additions and 1 deletions
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@ -46,7 +46,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(STM32F405State, STM32F405_SOC)
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#define FLASH_BASE_ADDRESS 0x08000000
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#define FLASH_SIZE (1024 * 1024)
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#define SRAM_BASE_ADDRESS 0x20000000
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#define SRAM_SIZE (192 * 1024)
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#define SRAM_SIZE (128 * 1024)
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#define CCM_BASE_ADDRESS 0x10000000
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#define CCM_SIZE (64 * 1024)
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struct STM32F405State {
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/*< private >*/
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@ -65,6 +67,7 @@ struct STM32F405State {
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STM32F2XXADCState adc[STM_NUM_ADCS];
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STM32F2XXSPIState spi[STM_NUM_SPIS];
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MemoryRegion ccm;
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MemoryRegion sram;
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MemoryRegion flash;
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MemoryRegion flash_alias;
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