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Add basic OMAP2 chip support.
Add the OMAP242x (arm1136 core) initialisation with basic on-chip peripherals and update OMAP1 peripherals which are re-used in OMAP2. Make palmte.c and sd.c errors go to stderr. Allow disabling SD chipselect. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4213 c046a42c-6fe2-441c-8c8c-71466251a162
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14 changed files with 6936 additions and 226 deletions
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@ -55,6 +55,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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env->cp15.c0_cachetype = 0x1dd20d2;
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env->cp15.c1_sys = 0x00090078;
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break;
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case ARM_CPUID_ARM1136_R2:
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case ARM_CPUID_ARM1136:
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set_feature(env, ARM_FEATURE_V6);
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set_feature(env, ARM_FEATURE_VFP);
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@ -206,6 +207,7 @@ static const struct arm_cpu_t arm_cpu_names[] = {
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{ ARM_CPUID_ARM946, "arm946"},
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{ ARM_CPUID_ARM1026, "arm1026"},
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{ ARM_CPUID_ARM1136, "arm1136"},
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{ ARM_CPUID_ARM1136_R2, "arm1136-r2"},
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{ ARM_CPUID_ARM11MPCORE, "arm11mpcore"},
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{ ARM_CPUID_CORTEXM3, "cortex-m3"},
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{ ARM_CPUID_CORTEXA8, "cortex-a8"},
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@ -1582,6 +1584,7 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn)
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case ARM_CPUID_ARM1026:
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return 1;
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case ARM_CPUID_ARM1136:
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case ARM_CPUID_ARM1136_R2:
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return 7;
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case ARM_CPUID_ARM11MPCORE:
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return 1;
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@ -1762,6 +1765,10 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn)
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case 8: /* TI925T_status */
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return 0;
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}
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/* TODO: Peripheral port remap register:
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* On OMAP2 mcr p15, 0, rn, c15, c2, 4 sets up the interrupt
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* controller base address at $rn & ~0xfff and map size of
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* 0x200 << ($rn & 0xfff), when MMU is off. */
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goto bad_reg;
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}
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return 0;
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