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Use DECLARE_*CHECKER* macros

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Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-12-ehabkost@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-13-ehabkost@redhat.com>
Message-Id: <20200831210740.126168-14-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
This commit is contained in:
Eduardo Habkost 2020-08-31 17:07:33 -04:00
parent db1015e92e
commit 8110fa1d94
791 changed files with 1987 additions and 2423 deletions
Download patch file Download diff file Expand all files Collapse all files

8
include/hw/acpi/acpi_dev_interface.h
View file

@ -19,12 +19,8 @@ typedef enum {
#define TYPE_ACPI_DEVICE_IF "acpi-device-interface"
typedef struct AcpiDeviceIfClass AcpiDeviceIfClass;
#define ACPI_DEVICE_IF_CLASS(klass) \
OBJECT_CLASS_CHECK(AcpiDeviceIfClass, (klass), \
TYPE_ACPI_DEVICE_IF)
#define ACPI_DEVICE_IF_GET_CLASS(obj) \
OBJECT_GET_CLASS(AcpiDeviceIfClass, (obj), \
TYPE_ACPI_DEVICE_IF)
DECLARE_CLASS_CHECKERS(AcpiDeviceIfClass, ACPI_DEVICE_IF,
TYPE_ACPI_DEVICE_IF)
#define ACPI_DEVICE_IF(obj) \
INTERFACE_CHECK(AcpiDeviceIf, (obj), \
TYPE_ACPI_DEVICE_IF)

4
include/hw/acpi/generic_event_device.h
View file

@ -68,8 +68,8 @@
#define TYPE_ACPI_GED "acpi-ged"
typedef struct AcpiGedState AcpiGedState;
#define ACPI_GED(obj) \
OBJECT_CHECK(AcpiGedState, (obj), TYPE_ACPI_GED)
DECLARE_INSTANCE_CHECKER(AcpiGedState, ACPI_GED,
TYPE_ACPI_GED)
#define ACPI_GED_EVT_SEL_OFFSET 0x0
#define ACPI_GED_EVT_SEL_LEN 0x4

3
include/hw/acpi/vmgenid.h
View file

@ -17,7 +17,8 @@
*/
typedef struct VmGenIdState VmGenIdState;
#define VMGENID(obj) OBJECT_CHECK(VmGenIdState, (obj), VMGENID_DEVICE)
DECLARE_INSTANCE_CHECKER(VmGenIdState, VMGENID,
VMGENID_DEVICE)
struct VmGenIdState {
DeviceClass parent_obj;

4
include/hw/adc/stm32f2xx_adc.h
View file

@ -60,8 +60,8 @@
#define TYPE_STM32F2XX_ADC "stm32f2xx-adc"
typedef struct STM32F2XXADCState STM32F2XXADCState;
#define STM32F2XX_ADC(obj) \
OBJECT_CHECK(STM32F2XXADCState, (obj), TYPE_STM32F2XX_ADC)
DECLARE_INSTANCE_CHECKER(STM32F2XXADCState, STM32F2XX_ADC,
TYPE_STM32F2XX_ADC)
struct STM32F2XXADCState {
/* <private> */

3
include/hw/arm/allwinner-a10.h
View file

@ -23,7 +23,8 @@
#define TYPE_AW_A10 "allwinner-a10"
typedef struct AwA10State AwA10State;
#define AW_A10(obj) OBJECT_CHECK(AwA10State, (obj), TYPE_AW_A10)
DECLARE_INSTANCE_CHECKER(AwA10State, AW_A10,
TYPE_AW_A10)
struct AwA10State {
/*< private >*/

3
include/hw/arm/allwinner-h3.h
View file

@ -107,7 +107,8 @@ enum {
/** Convert input object to Allwinner H3 state object */
typedef struct AwH3State AwH3State;
#define AW_H3(obj) OBJECT_CHECK(AwH3State, (obj), TYPE_AW_H3)
DECLARE_INSTANCE_CHECKER(AwH3State, AW_H3,
TYPE_AW_H3)
/** @} */

7
include/hw/arm/armsse.h
View file

@ -110,7 +110,8 @@
#define TYPE_ARM_SSE "arm-sse"
typedef struct ARMSSE ARMSSE;
typedef struct ARMSSEClass ARMSSEClass;
#define ARM_SSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARM_SSE)
DECLARE_OBJ_CHECKERS(ARMSSE, ARMSSEClass,
ARM_SSE, TYPE_ARM_SSE)
/*
* These type names are for specific IoTKit subsystems; other than
@ -227,9 +228,5 @@ struct ARMSSEClass {
const ARMSSEInfo *info;
};
#define ARM_SSE_CLASS(klass) \
OBJECT_CLASS_CHECK(ARMSSEClass, (klass), TYPE_ARM_SSE)
#define ARM_SSE_GET_CLASS(obj) \
OBJECT_GET_CLASS(ARMSSEClass, (obj), TYPE_ARM_SSE)
#endif

6
include/hw/arm/armv7m.h
View file

@ -17,7 +17,8 @@
#define TYPE_BITBAND "ARM,bitband-memory"
typedef struct BitBandState BitBandState;
#define BITBAND(obj) OBJECT_CHECK(BitBandState, (obj), TYPE_BITBAND)
DECLARE_INSTANCE_CHECKER(BitBandState, BITBAND,
TYPE_BITBAND)
struct BitBandState {
/*< private >*/
@ -32,7 +33,8 @@ struct BitBandState {
#define TYPE_ARMV7M "armv7m"
typedef struct ARMv7MState ARMv7MState;
#define ARMV7M(obj) OBJECT_CHECK(ARMv7MState, (obj), TYPE_ARMV7M)
DECLARE_INSTANCE_CHECKER(ARMv7MState, ARMV7M,
TYPE_ARMV7M)
#define ARMV7M_NUM_BITBANDS 2

8
include/hw/arm/aspeed.h
View file

@ -16,18 +16,14 @@ typedef struct AspeedMachineState AspeedMachineState;
#define TYPE_ASPEED_MACHINE MACHINE_TYPE_NAME("aspeed")
typedef struct AspeedMachineClass AspeedMachineClass;
#define ASPEED_MACHINE(obj) \
OBJECT_CHECK(AspeedMachineState, (obj), TYPE_ASPEED_MACHINE)
DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineClass,
ASPEED_MACHINE, TYPE_ASPEED_MACHINE)
#define ASPEED_MAC0_ON (1 << 0)
#define ASPEED_MAC1_ON (1 << 1)
#define ASPEED_MAC2_ON (1 << 2)
#define ASPEED_MAC3_ON (1 << 3)
#define ASPEED_MACHINE_CLASS(klass) \
OBJECT_CLASS_CHECK(AspeedMachineClass, (klass), TYPE_ASPEED_MACHINE)
#define ASPEED_MACHINE_GET_CLASS(obj) \
OBJECT_GET_CLASS(AspeedMachineClass, (obj), TYPE_ASPEED_MACHINE)
struct AspeedMachineClass {
MachineClass parent_obj;

7
include/hw/arm/aspeed_soc.h
View file

@ -66,7 +66,8 @@ typedef struct AspeedSoCState AspeedSoCState;
#define TYPE_ASPEED_SOC "aspeed-soc"
typedef struct AspeedSoCClass AspeedSoCClass;
#define ASPEED_SOC(obj) OBJECT_CHECK(AspeedSoCState, (obj), TYPE_ASPEED_SOC)
DECLARE_OBJ_CHECKERS(AspeedSoCState, AspeedSoCClass,
ASPEED_SOC, TYPE_ASPEED_SOC)
struct AspeedSoCClass {
DeviceClass parent_class;
@ -84,10 +85,6 @@ struct AspeedSoCClass {
uint32_t num_cpus;
};
#define ASPEED_SOC_CLASS(klass) \
OBJECT_CLASS_CHECK(AspeedSoCClass, (klass), TYPE_ASPEED_SOC)
#define ASPEED_SOC_GET_CLASS(obj) \
OBJECT_GET_CLASS(AspeedSoCClass, (obj), TYPE_ASPEED_SOC)
enum {
ASPEED_DEV_IOMEM,

4
include/hw/arm/bcm2835_peripherals.h
View file

@ -33,8 +33,8 @@
#define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
typedef struct BCM2835PeripheralState BCM2835PeripheralState;
#define BCM2835_PERIPHERALS(obj) \
OBJECT_CHECK(BCM2835PeripheralState, (obj), TYPE_BCM2835_PERIPHERALS)
DECLARE_INSTANCE_CHECKER(BCM2835PeripheralState, BCM2835_PERIPHERALS,
TYPE_BCM2835_PERIPHERALS)
struct BCM2835PeripheralState {
/*< private >*/

7
include/hw/arm/bcm2836.h
View file

@ -20,7 +20,8 @@
#define TYPE_BCM283X "bcm283x"
typedef struct BCM283XClass BCM283XClass;
typedef struct BCM283XState BCM283XState;
#define BCM283X(obj) OBJECT_CHECK(BCM283XState, (obj), TYPE_BCM283X)
DECLARE_OBJ_CHECKERS(BCM283XState, BCM283XClass,
BCM283X, TYPE_BCM283X)
#define BCM283X_NCPUS 4
@ -52,9 +53,5 @@ struct BCM283XClass {
const BCM283XInfo *info;
};
#define BCM283X_CLASS(klass) \
OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
#define BCM283X_GET_CLASS(obj) \
OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
#endif /* BCM2836_H */

3
include/hw/arm/digic.h
View file

@ -26,7 +26,8 @@
#define TYPE_DIGIC "digic"
typedef struct DigicState DigicState;
#define DIGIC(obj) OBJECT_CHECK(DigicState, (obj), TYPE_DIGIC)
DECLARE_INSTANCE_CHECKER(DigicState, DIGIC,
TYPE_DIGIC)
#define DIGIC4_NB_TIMERS 3

4
include/hw/arm/exynos4210.h
View file

@ -106,8 +106,8 @@ struct Exynos4210State {
typedef struct Exynos4210State Exynos4210State;
#define TYPE_EXYNOS4210_SOC "exynos4210"
#define EXYNOS4210_SOC(obj) \
OBJECT_CHECK(Exynos4210State, obj, TYPE_EXYNOS4210_SOC)
DECLARE_INSTANCE_CHECKER(Exynos4210State, EXYNOS4210_SOC,
TYPE_EXYNOS4210_SOC)
void exynos4210_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info);

3
include/hw/arm/fsl-imx25.h
View file

@ -36,7 +36,8 @@
#define TYPE_FSL_IMX25 "fsl,imx25"
typedef struct FslIMX25State FslIMX25State;
#define FSL_IMX25(obj) OBJECT_CHECK(FslIMX25State, (obj), TYPE_FSL_IMX25)
DECLARE_INSTANCE_CHECKER(FslIMX25State, FSL_IMX25,
TYPE_FSL_IMX25)
#define FSL_IMX25_NUM_UARTS 5
#define FSL_IMX25_NUM_GPTS 4

3
include/hw/arm/fsl-imx31.h
View file

@ -32,7 +32,8 @@
#define TYPE_FSL_IMX31 "fsl,imx31"
typedef struct FslIMX31State FslIMX31State;
#define FSL_IMX31(obj) OBJECT_CHECK(FslIMX31State, (obj), TYPE_FSL_IMX31)
DECLARE_INSTANCE_CHECKER(FslIMX31State, FSL_IMX31,
TYPE_FSL_IMX31)
#define FSL_IMX31_NUM_UARTS 2
#define FSL_IMX31_NUM_EPITS 2

3
include/hw/arm/fsl-imx6.h
View file

@ -38,7 +38,8 @@
#define TYPE_FSL_IMX6 "fsl,imx6"
typedef struct FslIMX6State FslIMX6State;
#define FSL_IMX6(obj) OBJECT_CHECK(FslIMX6State, (obj), TYPE_FSL_IMX6)
DECLARE_INSTANCE_CHECKER(FslIMX6State, FSL_IMX6,
TYPE_FSL_IMX6)
#define FSL_IMX6_NUM_CPUS 4
#define FSL_IMX6_NUM_UARTS 5

3
include/hw/arm/fsl-imx6ul.h
View file

@ -42,7 +42,8 @@
#define TYPE_FSL_IMX6UL "fsl,imx6ul"
typedef struct FslIMX6ULState FslIMX6ULState;
#define FSL_IMX6UL(obj) OBJECT_CHECK(FslIMX6ULState, (obj), TYPE_FSL_IMX6UL)
DECLARE_INSTANCE_CHECKER(FslIMX6ULState, FSL_IMX6UL,
TYPE_FSL_IMX6UL)
enum FslIMX6ULConfiguration {
FSL_IMX6UL_NUM_CPUS = 1,

3
include/hw/arm/fsl-imx7.h
View file

@ -43,7 +43,8 @@
#define TYPE_FSL_IMX7 "fsl,imx7"
typedef struct FslIMX7State FslIMX7State;
#define FSL_IMX7(obj) OBJECT_CHECK(FslIMX7State, (obj), TYPE_FSL_IMX7)
DECLARE_INSTANCE_CHECKER(FslIMX7State, FSL_IMX7,
TYPE_FSL_IMX7)
enum FslIMX7Configuration {
FSL_IMX7_NUM_CPUS = 2,

6
include/hw/arm/linux-boot-if.h
View file

@ -10,10 +10,8 @@
#define TYPE_ARM_LINUX_BOOT_IF "arm-linux-boot-if"
typedef struct ARMLinuxBootIfClass ARMLinuxBootIfClass;
#define ARM_LINUX_BOOT_IF_CLASS(klass) \
OBJECT_CLASS_CHECK(ARMLinuxBootIfClass, (klass), TYPE_ARM_LINUX_BOOT_IF)
#define ARM_LINUX_BOOT_IF_GET_CLASS(obj) \
OBJECT_GET_CLASS(ARMLinuxBootIfClass, (obj), TYPE_ARM_LINUX_BOOT_IF)
DECLARE_CLASS_CHECKERS(ARMLinuxBootIfClass, ARM_LINUX_BOOT_IF,
TYPE_ARM_LINUX_BOOT_IF)
#define ARM_LINUX_BOOT_IF(obj) \
INTERFACE_CHECK(ARMLinuxBootIf, (obj), TYPE_ARM_LINUX_BOOT_IF)

3
include/hw/arm/msf2-soc.h
View file

@ -34,7 +34,8 @@
#define TYPE_MSF2_SOC "msf2-soc"
typedef struct MSF2State MSF2State;
#define MSF2_SOC(obj) OBJECT_CHECK(MSF2State, (obj), TYPE_MSF2_SOC)
DECLARE_INSTANCE_CHECKER(MSF2State, MSF2_SOC,
TYPE_MSF2_SOC)
#define MSF2_NUM_SPIS 2
#define MSF2_NUM_UARTS 2

4
include/hw/arm/nrf51_soc.h
View file

@ -21,8 +21,8 @@
#define TYPE_NRF51_SOC "nrf51-soc"
typedef struct NRF51State NRF51State;
#define NRF51_SOC(obj) \
OBJECT_CHECK(NRF51State, (obj), TYPE_NRF51_SOC)
DECLARE_INSTANCE_CHECKER(NRF51State, NRF51_SOC,
TYPE_NRF51_SOC)
#define NRF51_NUM_TIMERS 3

15
include/hw/arm/omap.h
View file

@ -71,8 +71,8 @@ void omap_clk_reparent(omap_clk clk, omap_clk parent);
/* omap_intc.c */
#define TYPE_OMAP_INTC "common-omap-intc"
typedef struct omap_intr_handler_s omap_intr_handler;
#define OMAP_INTC(obj) \
OBJECT_CHECK(omap_intr_handler, (obj), TYPE_OMAP_INTC)
DECLARE_INSTANCE_CHECKER(omap_intr_handler, OMAP_INTC,
TYPE_OMAP_INTC)
/*
@ -95,7 +95,8 @@ void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk);
/* omap_i2c.c */
#define TYPE_OMAP_I2C "omap_i2c"
typedef struct OMAPI2CState OMAPI2CState;
#define OMAP_I2C(obj) OBJECT_CHECK(OMAPI2CState, (obj), TYPE_OMAP_I2C)
DECLARE_INSTANCE_CHECKER(OMAPI2CState, OMAP_I2C,
TYPE_OMAP_I2C)
/* TODO: clock framework (see above) */
@ -104,12 +105,12 @@ void omap_i2c_set_fclk(OMAPI2CState *i2c, omap_clk clk);
/* omap_gpio.c */
#define TYPE_OMAP1_GPIO "omap-gpio"
#define OMAP1_GPIO(obj) \
OBJECT_CHECK(struct omap_gpif_s, (obj), TYPE_OMAP1_GPIO)
DECLARE_INSTANCE_CHECKER(struct omap_gpif_s, OMAP1_GPIO,
TYPE_OMAP1_GPIO)
#define TYPE_OMAP2_GPIO "omap2-gpio"
#define OMAP2_GPIO(obj) \
OBJECT_CHECK(struct omap2_gpif_s, (obj), TYPE_OMAP2_GPIO)
DECLARE_INSTANCE_CHECKER(struct omap2_gpif_s, OMAP2_GPIO,
TYPE_OMAP2_GPIO)
typedef struct omap_gpif_s omap_gpif;
typedef struct omap2_gpif_s omap2_gpif;

14
include/hw/arm/pxa.h
View file

@ -89,7 +89,8 @@ void pxa2xx_lcd_vsync_notifier(PXA2xxLCDState *s, qemu_irq handler);
/* pxa2xx_mmci.c */
#define TYPE_PXA2XX_MMCI "pxa2xx-mmci"
typedef struct PXA2xxMMCIState PXA2xxMMCIState;
#define PXA2XX_MMCI(obj) OBJECT_CHECK(PXA2xxMMCIState, (obj), TYPE_PXA2XX_MMCI)
DECLARE_INSTANCE_CHECKER(PXA2xxMMCIState, PXA2XX_MMCI,
TYPE_PXA2XX_MMCI)
PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem,
hwaddr base,
@ -100,8 +101,8 @@ void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq readonly,
/* pxa2xx_pcmcia.c */
#define TYPE_PXA2XX_PCMCIA "pxa2xx-pcmcia"
typedef struct PXA2xxPCMCIAState PXA2xxPCMCIAState;
#define PXA2XX_PCMCIA(obj) \
OBJECT_CHECK(PXA2xxPCMCIAState, obj, TYPE_PXA2XX_PCMCIA)
DECLARE_INSTANCE_CHECKER(PXA2xxPCMCIAState, PXA2XX_PCMCIA,
TYPE_PXA2XX_PCMCIA)
PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem,
hwaddr base);
@ -129,12 +130,13 @@ I2CBus *pxa2xx_i2c_bus(PXA2xxI2CState *s);
#define TYPE_PXA2XX_I2C "pxa2xx_i2c"
typedef struct PXA2xxI2SState PXA2xxI2SState;
#define PXA2XX_I2C(obj) \
OBJECT_CHECK(PXA2xxI2CState, (obj), TYPE_PXA2XX_I2C)
DECLARE_INSTANCE_CHECKER(PXA2xxI2CState, PXA2XX_I2C,
TYPE_PXA2XX_I2C)
#define TYPE_PXA2XX_FIR "pxa2xx-fir"
typedef struct PXA2xxFIrState PXA2xxFIrState;
#define PXA2XX_FIR(obj) OBJECT_CHECK(PXA2xxFIrState, (obj), TYPE_PXA2XX_FIR)
DECLARE_INSTANCE_CHECKER(PXA2xxFIrState, PXA2XX_FIR,
TYPE_PXA2XX_FIR)
typedef struct {
ARMCPU *cpu;

7
include/hw/arm/smmu-common.h
View file

@ -132,11 +132,8 @@ struct SMMUBaseClass {
typedef struct SMMUBaseClass SMMUBaseClass;
#define TYPE_ARM_SMMU "arm-smmu"
#define ARM_SMMU(obj) OBJECT_CHECK(SMMUState, (obj), TYPE_ARM_SMMU)
#define ARM_SMMU_CLASS(klass) \
OBJECT_CLASS_CHECK(SMMUBaseClass, (klass), TYPE_ARM_SMMU)
#define ARM_SMMU_GET_CLASS(obj) \
OBJECT_GET_CLASS(SMMUBaseClass, (obj), TYPE_ARM_SMMU)
DECLARE_OBJ_CHECKERS(SMMUState, SMMUBaseClass,
ARM_SMMU, TYPE_ARM_SMMU)
/* Return the SMMUPciBus handle associated to a PCI bus number */
SMMUPciBus *smmu_find_smmu_pcibus(SMMUState *s, uint8_t bus_num);

7
include/hw/arm/smmuv3.h
View file

@ -83,10 +83,7 @@ struct SMMUv3Class {
typedef struct SMMUv3Class SMMUv3Class;
#define TYPE_ARM_SMMUV3 "arm-smmuv3"
#define ARM_SMMUV3(obj) OBJECT_CHECK(SMMUv3State, (obj), TYPE_ARM_SMMUV3)
#define ARM_SMMUV3_CLASS(klass) \
OBJECT_CLASS_CHECK(SMMUv3Class, (klass), TYPE_ARM_SMMUV3)
#define ARM_SMMUV3_GET_CLASS(obj) \
OBJECT_GET_CLASS(SMMUv3Class, (obj), TYPE_ARM_SMMUV3)
DECLARE_OBJ_CHECKERS(SMMUv3State, SMMUv3Class,
ARM_SMMUV3, TYPE_ARM_SMMUV3)
#endif

4
include/hw/arm/stm32f205_soc.h
View file

@ -36,8 +36,8 @@
#define TYPE_STM32F205_SOC "stm32f205-soc"
typedef struct STM32F205State STM32F205State;
#define STM32F205_SOC(obj) \
OBJECT_CHECK(STM32F205State, (obj), TYPE_STM32F205_SOC)
DECLARE_INSTANCE_CHECKER(STM32F205State, STM32F205_SOC,
TYPE_STM32F205_SOC)
#define STM_NUM_USARTS 6
#define STM_NUM_TIMERS 4

4
include/hw/arm/stm32f405_soc.h
View file

@ -37,8 +37,8 @@
#define TYPE_STM32F405_SOC "stm32f405-soc"
typedef struct STM32F405State STM32F405State;
#define STM32F405_SOC(obj) \
OBJECT_CHECK(STM32F405State, (obj), TYPE_STM32F405_SOC)
DECLARE_INSTANCE_CHECKER(STM32F405State, STM32F405_SOC,
TYPE_STM32F405_SOC)
#define STM_NUM_USARTS 7
#define STM_NUM_TIMERS 4

8
include/hw/arm/virt.h
View file

@ -170,12 +170,8 @@ typedef struct VirtMachineState VirtMachineState;
#define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
#define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
#define VIRT_MACHINE(obj) \
OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE)
#define VIRT_MACHINE_GET_CLASS(obj) \
OBJECT_GET_CLASS(VirtMachineClass, obj, TYPE_VIRT_MACHINE)
#define VIRT_MACHINE_CLASS(klass) \
OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE)
DECLARE_OBJ_CHECKERS(VirtMachineState, VirtMachineClass,
VIRT_MACHINE, TYPE_VIRT_MACHINE)
void virt_acpi_setup(VirtMachineState *vms);
bool virt_is_acpi_enabled(VirtMachineState *vms);

3
include/hw/arm/xlnx-versal.h
View file

@ -24,7 +24,8 @@
#define TYPE_XLNX_VERSAL "xlnx-versal"
typedef struct Versal Versal;
#define XLNX_VERSAL(obj) OBJECT_CHECK(Versal, (obj), TYPE_XLNX_VERSAL)
DECLARE_INSTANCE_CHECKER(Versal, XLNX_VERSAL,
TYPE_XLNX_VERSAL)
#define XLNX_VERSAL_NR_ACPUS 2
#define XLNX_VERSAL_NR_UARTS 2

4
include/hw/arm/xlnx-zynqmp.h
View file

@ -36,8 +36,8 @@
#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
typedef struct XlnxZynqMPState XlnxZynqMPState;
#define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
TYPE_XLNX_ZYNQMP)
DECLARE_INSTANCE_CHECKER(XlnxZynqMPState, XLNX_ZYNQMP,
TYPE_XLNX_ZYNQMP)
#define XLNX_ZYNQMP_NUM_APU_CPUS 4
#define XLNX_ZYNQMP_NUM_RPU_CPUS 2

8
include/hw/block/flash.h
View file

@ -10,8 +10,8 @@
#define TYPE_PFLASH_CFI01 "cfi.pflash01"
typedef struct PFlashCFI01 PFlashCFI01;
#define PFLASH_CFI01(obj) \
OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01)
DECLARE_INSTANCE_CHECKER(PFlashCFI01, PFLASH_CFI01,
TYPE_PFLASH_CFI01)
PFlashCFI01 *pflash_cfi01_register(hwaddr base,
@ -31,8 +31,8 @@ void pflash_cfi01_legacy_drive(PFlashCFI01 *dev, DriveInfo *dinfo);
#define TYPE_PFLASH_CFI02 "cfi.pflash02"
typedef struct PFlashCFI02 PFlashCFI02;
#define PFLASH_CFI02(obj) \
OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02)
DECLARE_INSTANCE_CHECKER(PFlashCFI02, PFLASH_CFI02,
TYPE_PFLASH_CFI02)
PFlashCFI02 *pflash_cfi02_register(hwaddr base,

9
include/hw/block/swim.h
View file

@ -22,7 +22,8 @@ typedef struct SWIMBus SWIMBus;
typedef struct SWIMCtrl SWIMCtrl;
#define TYPE_SWIM_DRIVE "swim-drive"
#define SWIM_DRIVE(obj) OBJECT_CHECK(SWIMDrive, (obj), TYPE_SWIM_DRIVE)
DECLARE_INSTANCE_CHECKER(SWIMDrive, SWIM_DRIVE,
TYPE_SWIM_DRIVE)
struct SWIMDrive {
DeviceState qdev;
@ -31,7 +32,8 @@ struct SWIMDrive {
};
#define TYPE_SWIM_BUS "swim-bus"
#define SWIM_BUS(obj) OBJECT_CHECK(SWIMBus, (obj), TYPE_SWIM_BUS)
DECLARE_INSTANCE_CHECKER(SWIMBus, SWIM_BUS,
TYPE_SWIM_BUS)
struct SWIMBus {
BusState bus;
@ -69,7 +71,8 @@ struct SWIMCtrl {
#define TYPE_SWIM "swim"
typedef struct Swim Swim;
#define SWIM(obj) OBJECT_CHECK(Swim, (obj), TYPE_SWIM)
DECLARE_INSTANCE_CHECKER(Swim, SWIM,
TYPE_SWIM)
struct Swim {
SysBusDevice parent_obj;

8
include/hw/boards.h
View file

@ -21,12 +21,8 @@
#define TYPE_MACHINE "machine"
#undef MACHINE /* BSD defines it and QEMU does not use it */
#define MACHINE(obj) \
OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
#define MACHINE_GET_CLASS(obj) \
OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
#define MACHINE_CLASS(klass) \
OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
DECLARE_OBJ_CHECKERS(MachineState, MachineClass,
MACHINE, TYPE_MACHINE)
extern MachineState *current_machine;

4
include/hw/char/avr_usart.h
View file

@ -59,8 +59,8 @@
#define TYPE_AVR_USART "avr-usart"
typedef struct AVRUsartState AVRUsartState;
#define AVR_USART(obj) \
OBJECT_CHECK(AVRUsartState, (obj), TYPE_AVR_USART)
DECLARE_INSTANCE_CHECKER(AVRUsartState, AVR_USART,
TYPE_AVR_USART)
struct AVRUsartState {
/* <private> */

3
include/hw/char/bcm2835_aux.h
View file

@ -15,7 +15,8 @@
#define TYPE_BCM2835_AUX "bcm2835-aux"
typedef struct BCM2835AuxState BCM2835AuxState;
#define BCM2835_AUX(obj) OBJECT_CHECK(BCM2835AuxState, (obj), TYPE_BCM2835_AUX)
DECLARE_INSTANCE_CHECKER(BCM2835AuxState, BCM2835_AUX,
TYPE_BCM2835_AUX)
#define BCM2835_AUX_RX_FIFO_LEN 8

4
include/hw/char/cadence_uart.h
View file

@ -33,8 +33,8 @@
#define TYPE_CADENCE_UART "cadence_uart"
typedef struct CadenceUARTState CadenceUARTState;
#define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \
TYPE_CADENCE_UART)
DECLARE_INSTANCE_CHECKER(CadenceUARTState, CADENCE_UART,
TYPE_CADENCE_UART)
struct CadenceUARTState {
/*< private >*/

4
include/hw/char/cmsdk-apb-uart.h
View file

@ -19,8 +19,8 @@
#define TYPE_CMSDK_APB_UART "cmsdk-apb-uart"
typedef struct CMSDKAPBUART CMSDKAPBUART;
#define CMSDK_APB_UART(obj) OBJECT_CHECK(CMSDKAPBUART, (obj), \
TYPE_CMSDK_APB_UART)
DECLARE_INSTANCE_CHECKER(CMSDKAPBUART, CMSDK_APB_UART,
TYPE_CMSDK_APB_UART)
struct CMSDKAPBUART {
/*< private >*/

4
include/hw/char/digic-uart.h
View file

@ -24,8 +24,8 @@
#define TYPE_DIGIC_UART "digic-uart"
typedef struct DigicUartState DigicUartState;
#define DIGIC_UART(obj) \
OBJECT_CHECK(DigicUartState, (obj), TYPE_DIGIC_UART)
DECLARE_INSTANCE_CHECKER(DigicUartState, DIGIC_UART,
TYPE_DIGIC_UART)
enum {
R_TX = 0x00,

3
include/hw/char/escc.h
View file

@ -12,7 +12,8 @@
#define ESCC_SIZE 4
typedef struct ESCCState ESCCState;
#define ESCC(obj) OBJECT_CHECK(ESCCState, (obj), TYPE_ESCC)
DECLARE_INSTANCE_CHECKER(ESCCState, ESCC,
TYPE_ESCC)
typedef enum {
escc_chn_a, escc_chn_b,

4
include/hw/char/ibex_uart.h
View file

@ -71,8 +71,8 @@ REG32(TIMEOUT_CTRL, 0x2c)
#define TYPE_IBEX_UART "ibex-uart"
typedef struct IbexUartState IbexUartState;
#define IBEX_UART(obj) \
OBJECT_CHECK(IbexUartState, (obj), TYPE_IBEX_UART)
DECLARE_INSTANCE_CHECKER(IbexUartState, IBEX_UART,
TYPE_IBEX_UART)
struct IbexUartState {
/* <private> */

3
include/hw/char/imx_serial.h
View file

@ -24,7 +24,8 @@
#define TYPE_IMX_SERIAL "imx.serial"
typedef struct IMXSerialState IMXSerialState;
#define IMX_SERIAL(obj) OBJECT_CHECK(IMXSerialState, (obj), TYPE_IMX_SERIAL)
DECLARE_INSTANCE_CHECKER(IMXSerialState, IMX_SERIAL,
TYPE_IMX_SERIAL)
#define URXD_CHARRDY (1<<15) /* character read is valid */
#define URXD_ERR (1<<14) /* Character has error */

3
include/hw/char/nrf51_uart.h
View file

@ -21,7 +21,8 @@
#define TYPE_NRF51_UART "nrf51_soc.uart"
typedef struct NRF51UARTState NRF51UARTState;
#define NRF51_UART(obj) OBJECT_CHECK(NRF51UARTState, (obj), TYPE_NRF51_UART)
DECLARE_INSTANCE_CHECKER(NRF51UARTState, NRF51_UART,
TYPE_NRF51_UART)
REG32(UART_STARTRX, 0x000)
REG32(UART_STOPRX, 0x004)

3
include/hw/char/pl011.h
View file

@ -23,7 +23,8 @@
#define TYPE_PL011 "pl011"
typedef struct PL011State PL011State;
#define PL011(obj) OBJECT_CHECK(PL011State, (obj), TYPE_PL011)
DECLARE_INSTANCE_CHECKER(PL011State, PL011,
TYPE_PL011)
/* This shares the same struct (and cast macro) as the base pl011 device */
#define TYPE_PL011_LUMINARY "pl011_luminary"

3
include/hw/char/renesas_sci.h
View file

@ -15,7 +15,8 @@
#define TYPE_RENESAS_SCI "renesas-sci"
typedef struct RSCIState RSCIState;
#define RSCI(obj) OBJECT_CHECK(RSCIState, (obj), TYPE_RENESAS_SCI)
DECLARE_INSTANCE_CHECKER(RSCIState, RSCI,
TYPE_RENESAS_SCI)
enum {
ERI = 0,

9
include/hw/char/serial.h
View file

@ -104,13 +104,16 @@ extern const MemoryRegionOps serial_io_ops;
void serial_set_frequency(SerialState *s, uint32_t frequency);
#define TYPE_SERIAL "serial"
#define SERIAL(s) OBJECT_CHECK(SerialState, (s), TYPE_SERIAL)
DECLARE_INSTANCE_CHECKER(SerialState, SERIAL,
TYPE_SERIAL)
#define TYPE_SERIAL_MM "serial-mm"
#define SERIAL_MM(s) OBJECT_CHECK(SerialMM, (s), TYPE_SERIAL_MM)
DECLARE_INSTANCE_CHECKER(SerialMM, SERIAL_MM,
TYPE_SERIAL_MM)
#define TYPE_SERIAL_IO "serial-io"
#define SERIAL_IO(s) OBJECT_CHECK(SerialIO, (s), TYPE_SERIAL_IO)
DECLARE_INSTANCE_CHECKER(SerialIO, SERIAL_IO,
TYPE_SERIAL_IO)
SerialMM *serial_mm_init(MemoryRegion *address_space,
hwaddr base, int regshift,

4
include/hw/char/stm32f2xx_usart.h
View file

@ -55,8 +55,8 @@
#define TYPE_STM32F2XX_USART "stm32f2xx-usart"
typedef struct STM32F2XXUsartState STM32F2XXUsartState;
#define STM32F2XX_USART(obj) \
OBJECT_CHECK(STM32F2XXUsartState, (obj), TYPE_STM32F2XX_USART)
DECLARE_INSTANCE_CHECKER(STM32F2XXUsartState, STM32F2XX_USART,
TYPE_STM32F2XX_USART)
struct STM32F2XXUsartState {
/* <private> */

3
include/hw/clock.h
View file

@ -19,7 +19,8 @@
#define TYPE_CLOCK "clock"
typedef struct Clock Clock;
#define CLOCK(obj) OBJECT_CHECK(Clock, (obj), TYPE_CLOCK)
DECLARE_INSTANCE_CHECKER(Clock, CLOCK,
TYPE_CLOCK)
typedef void ClockCallback(void *opaque);

4
include/hw/core/cpu.h
View file

@ -63,8 +63,8 @@ typedef uint64_t vaddr;
#define CPU(obj) ((CPUState *)(obj))
typedef struct CPUClass CPUClass;
#define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
#define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
DECLARE_CLASS_CHECKERS(CPUClass, CPU,
TYPE_CPU)
typedef enum MMUAccessType {
MMU_DATA_LOAD = 0,

4
include/hw/core/generic-loader.h
View file

@ -43,7 +43,7 @@ struct GenericLoaderState {
typedef struct GenericLoaderState GenericLoaderState;
#define TYPE_GENERIC_LOADER "loader"
#define GENERIC_LOADER(obj) OBJECT_CHECK(GenericLoaderState, (obj), \
TYPE_GENERIC_LOADER)
DECLARE_INSTANCE_CHECKER(GenericLoaderState, GENERIC_LOADER,
TYPE_GENERIC_LOADER)
#endif

3
include/hw/core/split-irq.h
View file

@ -44,7 +44,8 @@
typedef struct SplitIRQ SplitIRQ;
#define SPLIT_IRQ(obj) OBJECT_CHECK(SplitIRQ, (obj), TYPE_SPLIT_IRQ)
DECLARE_INSTANCE_CHECKER(SplitIRQ, SPLIT_IRQ,
TYPE_SPLIT_IRQ)
struct SplitIRQ {
DeviceState parent_obj;

4
include/hw/cpu/a15mpcore.h
View file

@ -28,8 +28,8 @@
#define TYPE_A15MPCORE_PRIV "a15mpcore_priv"
typedef struct A15MPPrivState A15MPPrivState;
#define A15MPCORE_PRIV(obj) \
OBJECT_CHECK(A15MPPrivState, (obj), TYPE_A15MPCORE_PRIV)
DECLARE_INSTANCE_CHECKER(A15MPPrivState, A15MPCORE_PRIV,
TYPE_A15MPCORE_PRIV)
struct A15MPPrivState {
/*< private >*/

4
include/hw/cpu/a9mpcore.h
View file

@ -19,8 +19,8 @@
#define TYPE_A9MPCORE_PRIV "a9mpcore_priv"
typedef struct A9MPPrivState A9MPPrivState;
#define A9MPCORE_PRIV(obj) \
OBJECT_CHECK(A9MPPrivState, (obj), TYPE_A9MPCORE_PRIV)
DECLARE_INSTANCE_CHECKER(A9MPPrivState, A9MPCORE_PRIV,
TYPE_A9MPCORE_PRIV)
struct A9MPPrivState {
/*< private >*/

4
include/hw/cpu/arm11mpcore.h
View file

@ -18,8 +18,8 @@
#define TYPE_ARM11MPCORE_PRIV "arm11mpcore_priv"
typedef struct ARM11MPCorePriveState ARM11MPCorePriveState;
#define ARM11MPCORE_PRIV(obj) \
OBJECT_CHECK(ARM11MPCorePriveState, (obj), TYPE_ARM11MPCORE_PRIV)
DECLARE_INSTANCE_CHECKER(ARM11MPCorePriveState, ARM11MPCORE_PRIV,
TYPE_ARM11MPCORE_PRIV)
struct ARM11MPCorePriveState {
SysBusDevice parent_obj;

4
include/hw/cpu/cluster.h
View file

@ -56,8 +56,8 @@
#define TYPE_CPU_CLUSTER "cpu-cluster"
typedef struct CPUClusterState CPUClusterState;
#define CPU_CLUSTER(obj) \
OBJECT_CHECK(CPUClusterState, (obj), TYPE_CPU_CLUSTER)
DECLARE_INSTANCE_CHECKER(CPUClusterState, CPU_CLUSTER,
TYPE_CPU_CLUSTER)
/*
* This limit is imposed by TCG, which puts the cluster ID into an

4
include/hw/cpu/core.h
View file

@ -15,8 +15,8 @@
#define TYPE_CPU_CORE "cpu-core"
typedef struct CPUCore CPUCore;
#define CPU_CORE(obj) \
OBJECT_CHECK(CPUCore, (obj), TYPE_CPU_CORE)
DECLARE_INSTANCE_CHECKER(CPUCore, CPU_CORE,
TYPE_CPU_CORE)
struct CPUCore {
/*< private >*/

3
include/hw/display/bcm2835_fb.h
View file

@ -18,7 +18,8 @@
#define TYPE_BCM2835_FB "bcm2835-fb"
typedef struct BCM2835FBState BCM2835FBState;
#define BCM2835_FB(obj) OBJECT_CHECK(BCM2835FBState, (obj), TYPE_BCM2835_FB)
DECLARE_INSTANCE_CHECKER(BCM2835FBState, BCM2835_FB,
TYPE_BCM2835_FB)
/*
* Configuration information about the fb which the guest can program

3
include/hw/display/dpcd.h
View file

@ -29,7 +29,8 @@
typedef struct DPCDState DPCDState;
#define TYPE_DPCD "dpcd"
#define DPCD(obj) OBJECT_CHECK(DPCDState, (obj), TYPE_DPCD)
DECLARE_INSTANCE_CHECKER(DPCDState, DPCD,
TYPE_DPCD)
/* DCPD Revision. */
#define DPCD_REVISION 0x00

3
include/hw/display/i2c-ddc.h
View file

@ -37,6 +37,7 @@ struct I2CDDCState {
typedef struct I2CDDCState I2CDDCState;
#define TYPE_I2CDDC "i2c-ddc"
#define I2CDDC(obj) OBJECT_CHECK(I2CDDCState, (obj), TYPE_I2CDDC)
DECLARE_INSTANCE_CHECKER(I2CDDCState, I2CDDC,
TYPE_I2CDDC)
#endif /* I2C_DDC_H */

12
include/hw/display/macfb.h
View file

@ -33,8 +33,8 @@ typedef struct MacfbState {
#define TYPE_MACFB "sysbus-macfb"
typedef struct MacfbSysBusState MacfbSysBusState;
#define MACFB(obj) \
OBJECT_CHECK(MacfbSysBusState, (obj), TYPE_MACFB)
DECLARE_INSTANCE_CHECKER(MacfbSysBusState, MACFB,
TYPE_MACFB)
struct MacfbSysBusState {
SysBusDevice busdev;
@ -45,10 +45,8 @@ struct MacfbSysBusState {
#define TYPE_NUBUS_MACFB "nubus-macfb"
typedef struct MacfbNubusDeviceClass MacfbNubusDeviceClass;
typedef struct MacfbNubusState MacfbNubusState;
#define NUBUS_MACFB_CLASS(class) \
OBJECT_CLASS_CHECK(MacfbNubusDeviceClass, (class), TYPE_NUBUS_MACFB)
#define NUBUS_MACFB_GET_CLASS(obj) \
OBJECT_GET_CLASS(MacfbNubusDeviceClass, (obj), TYPE_NUBUS_MACFB)
DECLARE_OBJ_CHECKERS(MacfbNubusState, MacfbNubusDeviceClass,
NUBUS_MACFB, TYPE_NUBUS_MACFB)
struct MacfbNubusDeviceClass {
DeviceClass parent_class;
@ -56,8 +54,6 @@ struct MacfbNubusDeviceClass {
DeviceRealize parent_realize;
};
#define NUBUS_MACFB(obj) \
OBJECT_CHECK(MacfbNubusState, (obj), TYPE_NUBUS_MACFB)
struct MacfbNubusState {
NubusDevice busdev;

3
include/hw/display/xlnx_dp.h
View file

@ -106,6 +106,7 @@ struct XlnxDPState {
typedef struct XlnxDPState XlnxDPState;
#define TYPE_XLNX_DP "xlnx.v-dp"
#define XLNX_DP(obj) OBJECT_CHECK(XlnxDPState, (obj), TYPE_XLNX_DP)
DECLARE_INSTANCE_CHECKER(XlnxDPState, XLNX_DP,
TYPE_XLNX_DP)
#endif

4
include/hw/dma/bcm2835_dma.h
View file

@ -27,8 +27,8 @@ typedef struct {
#define TYPE_BCM2835_DMA "bcm2835-dma"
typedef struct BCM2835DMAState BCM2835DMAState;
#define BCM2835_DMA(obj) \
OBJECT_CHECK(BCM2835DMAState, (obj), TYPE_BCM2835_DMA)
DECLARE_INSTANCE_CHECKER(BCM2835DMAState, BCM2835_DMA,
TYPE_BCM2835_DMA)
#define BCM2835_DMA_NCHANS 16

4
include/hw/dma/i8257.h
View file

@ -7,8 +7,8 @@
#define TYPE_I8257 "i8257"
typedef struct I8257State I8257State;
#define I8257(obj) \
OBJECT_CHECK(I8257State, (obj), TYPE_I8257)
DECLARE_INSTANCE_CHECKER(I8257State, I8257,
TYPE_I8257)
typedef struct I8257Regs {
int now[2];

3
include/hw/dma/pl080.h
View file

@ -44,7 +44,8 @@ typedef struct {
#define TYPE_PL080 "pl080"
#define TYPE_PL081 "pl081"
typedef struct PL080State PL080State;
#define PL080(obj) OBJECT_CHECK(PL080State, (obj), TYPE_PL080)
DECLARE_INSTANCE_CHECKER(PL080State, PL080,
TYPE_PL080)
struct PL080State {
SysBusDevice parent_obj;

4
include/hw/dma/xlnx-zdma.h
View file

@ -80,7 +80,7 @@ typedef struct XlnxZDMA XlnxZDMA;
#define TYPE_XLNX_ZDMA "xlnx.zdma"
#define XLNX_ZDMA(obj) \
OBJECT_CHECK(XlnxZDMA, (obj), TYPE_XLNX_ZDMA)
DECLARE_INSTANCE_CHECKER(XlnxZDMA, XLNX_ZDMA,
TYPE_XLNX_ZDMA)
#endif /* XLNX_ZDMA_H */

4
include/hw/dma/xlnx-zynq-devcfg.h
View file

@ -34,8 +34,8 @@
#define TYPE_XLNX_ZYNQ_DEVCFG "xlnx.ps7-dev-cfg"
typedef struct XlnxZynqDevcfg XlnxZynqDevcfg;
#define XLNX_ZYNQ_DEVCFG(obj) \
OBJECT_CHECK(XlnxZynqDevcfg, (obj), TYPE_XLNX_ZYNQ_DEVCFG)
DECLARE_INSTANCE_CHECKER(XlnxZynqDevcfg, XLNX_ZYNQ_DEVCFG,
TYPE_XLNX_ZYNQ_DEVCFG)
#define XLNX_ZYNQ_DEVCFG_R_MAX (0x100 / 4)

3
include/hw/dma/xlnx_dpdma.h
View file

@ -46,7 +46,8 @@ struct XlnxDPDMAState {
typedef struct XlnxDPDMAState XlnxDPDMAState;
#define TYPE_XLNX_DPDMA "xlnx.dpdma"
#define XLNX_DPDMA(obj) OBJECT_CHECK(XlnxDPDMAState, (obj), TYPE_XLNX_DPDMA)
DECLARE_INSTANCE_CHECKER(XlnxDPDMAState, XLNX_DPDMA,
TYPE_XLNX_DPDMA)
/*
* xlnx_dpdma_start_operation: Start the operation on the specified channel. The

6
include/hw/fw-path-provider.h
View file

@ -23,10 +23,8 @@
#define TYPE_FW_PATH_PROVIDER "fw-path-provider"
typedef struct FWPathProviderClass FWPathProviderClass;
#define FW_PATH_PROVIDER_CLASS(klass) \
OBJECT_CLASS_CHECK(FWPathProviderClass, (klass), TYPE_FW_PATH_PROVIDER)
#define FW_PATH_PROVIDER_GET_CLASS(obj) \
OBJECT_GET_CLASS(FWPathProviderClass, (obj), TYPE_FW_PATH_PROVIDER)
DECLARE_CLASS_CHECKERS(FWPathProviderClass, FW_PATH_PROVIDER,
TYPE_FW_PATH_PROVIDER)
#define FW_PATH_PROVIDER(obj) \
INTERFACE_CHECK(FWPathProvider, (obj), TYPE_FW_PATH_PROVIDER)

7
include/hw/gpio/aspeed_gpio.h
View file

@ -16,11 +16,8 @@
#define TYPE_ASPEED_GPIO "aspeed.gpio"
typedef struct AspeedGPIOClass AspeedGPIOClass;
typedef struct AspeedGPIOState AspeedGPIOState;
#define ASPEED_GPIO(obj) OBJECT_CHECK(AspeedGPIOState, (obj), TYPE_ASPEED_GPIO)
#define ASPEED_GPIO_CLASS(klass) \
OBJECT_CLASS_CHECK(AspeedGPIOClass, (klass), TYPE_ASPEED_GPIO)
#define ASPEED_GPIO_GET_CLASS(obj) \
OBJECT_GET_CLASS(AspeedGPIOClass, (obj), TYPE_ASPEED_GPIO)
DECLARE_OBJ_CHECKERS(AspeedGPIOState, AspeedGPIOClass,
ASPEED_GPIO, TYPE_ASPEED_GPIO)
#define ASPEED_GPIO_MAX_NR_SETS 8
#define ASPEED_REGS_PER_BANK 14

4
include/hw/gpio/bcm2835_gpio.h
View file

@ -36,7 +36,7 @@ struct BCM2835GpioState {
typedef struct BCM2835GpioState BCM2835GpioState;
#define TYPE_BCM2835_GPIO "bcm2835_gpio"
#define BCM2835_GPIO(obj) \
OBJECT_CHECK(BCM2835GpioState, (obj), TYPE_BCM2835_GPIO)
DECLARE_INSTANCE_CHECKER(BCM2835GpioState, BCM2835_GPIO,
TYPE_BCM2835_GPIO)
#endif

3
include/hw/gpio/imx_gpio.h
View file

@ -25,7 +25,8 @@
#define TYPE_IMX_GPIO "imx.gpio"
typedef struct IMXGPIOState IMXGPIOState;
#define IMX_GPIO(obj) OBJECT_CHECK(IMXGPIOState, (obj), TYPE_IMX_GPIO)
DECLARE_INSTANCE_CHECKER(IMXGPIOState, IMX_GPIO,
TYPE_IMX_GPIO)
#define IMX_GPIO_MEM_SIZE 0x20

3
include/hw/gpio/nrf51_gpio.h
View file

@ -30,7 +30,8 @@
#include "qom/object.h"
#define TYPE_NRF51_GPIO "nrf51_soc.gpio"
typedef struct NRF51GPIOState NRF51GPIOState;
#define NRF51_GPIO(obj) OBJECT_CHECK(NRF51GPIOState, (obj), TYPE_NRF51_GPIO)
DECLARE_INSTANCE_CHECKER(NRF51GPIOState, NRF51_GPIO,
TYPE_NRF51_GPIO)
#define NRF51_GPIO_PINS 32

6
include/hw/hotplug.h
View file

@ -17,10 +17,8 @@
#define TYPE_HOTPLUG_HANDLER "hotplug-handler"
typedef struct HotplugHandlerClass HotplugHandlerClass;
#define HOTPLUG_HANDLER_CLASS(klass) \
OBJECT_CLASS_CHECK(HotplugHandlerClass, (klass), TYPE_HOTPLUG_HANDLER)
#define HOTPLUG_HANDLER_GET_CLASS(obj) \
OBJECT_GET_CLASS(HotplugHandlerClass, (obj), TYPE_HOTPLUG_HANDLER)
DECLARE_CLASS_CHECKERS(HotplugHandlerClass, HOTPLUG_HANDLER,
TYPE_HOTPLUG_HANDLER)
#define HOTPLUG_HANDLER(obj) \
INTERFACE_CHECK(HotplugHandler, (obj), TYPE_HOTPLUG_HANDLER)

3
include/hw/hyperv/vmbus-bridge.h
View file

@ -25,7 +25,8 @@ struct VMBusBridge {
};
typedef struct VMBusBridge VMBusBridge;
#define VMBUS_BRIDGE(obj) OBJECT_CHECK(VMBusBridge, (obj), TYPE_VMBUS_BRIDGE)
DECLARE_INSTANCE_CHECKER(VMBusBridge, VMBUS_BRIDGE,
TYPE_VMBUS_BRIDGE)
static inline VMBusBridge *vmbus_bridge_find(void)
{

11
include/hw/hyperv/vmbus.h
View file

@ -22,16 +22,13 @@
typedef struct VMBusDevice VMBusDevice;
typedef struct VMBusDeviceClass VMBusDeviceClass;
#define VMBUS_DEVICE(obj) \
OBJECT_CHECK(VMBusDevice, (obj), TYPE_VMBUS_DEVICE)
#define VMBUS_DEVICE_CLASS(klass) \
OBJECT_CLASS_CHECK(VMBusDeviceClass, (klass), TYPE_VMBUS_DEVICE)
#define VMBUS_DEVICE_GET_CLASS(obj) \
OBJECT_GET_CLASS(VMBusDeviceClass, (obj), TYPE_VMBUS_DEVICE)
DECLARE_OBJ_CHECKERS(VMBusDevice, VMBusDeviceClass,
VMBUS_DEVICE, TYPE_VMBUS_DEVICE)
#define TYPE_VMBUS "vmbus"
typedef struct VMBus VMBus;
#define VMBUS(obj) OBJECT_CHECK(VMBus, (obj), TYPE_VMBUS)
DECLARE_INSTANCE_CHECKER(VMBus, VMBUS,
TYPE_VMBUS)
/*
* Object wrapping a GPADL -- GPA Descriptor List -- an array of guest physical

4
include/hw/i2c/arm_sbcon_i2c.h
View file

@ -20,8 +20,8 @@
#define TYPE_ARM_SBCON_I2C TYPE_VERSATILE_I2C
typedef struct ArmSbconI2CState ArmSbconI2CState;
#define ARM_SBCON_I2C(obj) \
OBJECT_CHECK(ArmSbconI2CState, (obj), TYPE_ARM_SBCON_I2C)
DECLARE_INSTANCE_CHECKER(ArmSbconI2CState, ARM_SBCON_I2C,
TYPE_ARM_SBCON_I2C)
struct ArmSbconI2CState {
/*< private >*/

8
include/hw/i2c/aspeed_i2c.h
View file

@ -31,8 +31,8 @@
#define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600"
typedef struct AspeedI2CClass AspeedI2CClass;
typedef struct AspeedI2CState AspeedI2CState;
#define ASPEED_I2C(obj) \
OBJECT_CHECK(AspeedI2CState, (obj), TYPE_ASPEED_I2C)
DECLARE_OBJ_CHECKERS(AspeedI2CState, AspeedI2CClass,
ASPEED_I2C, TYPE_ASPEED_I2C)
#define ASPEED_I2C_NR_BUSSES 16
#define ASPEED_I2C_MAX_POOL_SIZE 0x800
@ -75,10 +75,6 @@ struct AspeedI2CState {
AddressSpace dram_as;
};
#define ASPEED_I2C_CLASS(klass) \
OBJECT_CLASS_CHECK(AspeedI2CClass, (klass), TYPE_ASPEED_I2C)
#define ASPEED_I2C_GET_CLASS(obj) \
OBJECT_GET_CLASS(AspeedI2CClass, (obj), TYPE_ASPEED_I2C)
struct AspeedI2CClass {
SysBusDeviceClass parent_class;

11
include/hw/i2c/i2c.h
View file

@ -20,12 +20,8 @@ typedef struct I2CSlave I2CSlave;
#define TYPE_I2C_SLAVE "i2c-slave"
typedef struct I2CSlaveClass I2CSlaveClass;
#define I2C_SLAVE(obj) \
OBJECT_CHECK(I2CSlave, (obj), TYPE_I2C_SLAVE)
#define I2C_SLAVE_CLASS(klass) \
OBJECT_CLASS_CHECK(I2CSlaveClass, (klass), TYPE_I2C_SLAVE)
#define I2C_SLAVE_GET_CLASS(obj) \
OBJECT_GET_CLASS(I2CSlaveClass, (obj), TYPE_I2C_SLAVE)
DECLARE_OBJ_CHECKERS(I2CSlave, I2CSlaveClass,
I2C_SLAVE, TYPE_I2C_SLAVE)
struct I2CSlaveClass {
DeviceClass parent_class;
@ -55,7 +51,8 @@ struct I2CSlave {
};
#define TYPE_I2C_BUS "i2c-bus"
#define I2C_BUS(obj) OBJECT_CHECK(I2CBus, (obj), TYPE_I2C_BUS)
DECLARE_INSTANCE_CHECKER(I2CBus, I2C_BUS,
TYPE_I2C_BUS)
typedef struct I2CNode I2CNode;

3
include/hw/i2c/imx_i2c.h
View file

@ -26,7 +26,8 @@
#define TYPE_IMX_I2C "imx.i2c"
typedef struct IMXI2CState IMXI2CState;
#define IMX_I2C(obj) OBJECT_CHECK(IMXI2CState, (obj), TYPE_IMX_I2C)
DECLARE_INSTANCE_CHECKER(IMXI2CState, IMX_I2C,
TYPE_IMX_I2C)
#define IMX_I2C_MEM_SIZE 0x14

4
include/hw/i2c/microbit_i2c.h
View file

@ -28,8 +28,8 @@
#define TYPE_MICROBIT_I2C "microbit.i2c"
typedef struct MicrobitI2CState MicrobitI2CState;
#define MICROBIT_I2C(obj) \
OBJECT_CHECK(MicrobitI2CState, (obj), TYPE_MICROBIT_I2C)
DECLARE_INSTANCE_CHECKER(MicrobitI2CState, MICROBIT_I2C,
TYPE_MICROBIT_I2C)
#define MICROBIT_I2C_NREGS (NRF51_PERIPHERAL_SIZE / sizeof(uint32_t))

3
include/hw/i2c/ppc4xx_i2c.h
View file

@ -33,7 +33,8 @@
#define TYPE_PPC4xx_I2C "ppc4xx-i2c"
typedef struct PPC4xxI2CState PPC4xxI2CState;
#define PPC4xx_I2C(obj) OBJECT_CHECK(PPC4xxI2CState, (obj), TYPE_PPC4xx_I2C)
DECLARE_INSTANCE_CHECKER(PPC4xxI2CState, PPC4xx_I2C,
TYPE_PPC4xx_I2C)
struct PPC4xxI2CState {
/*< private >*/

8
include/hw/i2c/smbus_slave.h
View file

@ -31,12 +31,8 @@
#define TYPE_SMBUS_DEVICE "smbus-device"
typedef struct SMBusDevice SMBusDevice;
typedef struct SMBusDeviceClass SMBusDeviceClass;
#define SMBUS_DEVICE(obj) \
OBJECT_CHECK(SMBusDevice, (obj), TYPE_SMBUS_DEVICE)
#define SMBUS_DEVICE_CLASS(klass) \
OBJECT_CLASS_CHECK(SMBusDeviceClass, (klass), TYPE_SMBUS_DEVICE)
#define SMBUS_DEVICE_GET_CLASS(obj) \
OBJECT_GET_CLASS(SMBusDeviceClass, (obj), TYPE_SMBUS_DEVICE)
DECLARE_OBJ_CHECKERS(SMBusDevice, SMBusDeviceClass,
SMBUS_DEVICE, TYPE_SMBUS_DEVICE)
struct SMBusDeviceClass {

8
include/hw/i386/apic_internal.h
View file

@ -127,12 +127,8 @@ typedef struct APICCommonState APICCommonState;
#define TYPE_APIC_COMMON "apic-common"
typedef struct APICCommonClass APICCommonClass;
#define APIC_COMMON(obj) \
OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC_COMMON)
#define APIC_COMMON_CLASS(klass) \
OBJECT_CLASS_CHECK(APICCommonClass, (klass), TYPE_APIC_COMMON)
#define APIC_COMMON_GET_CLASS(obj) \
OBJECT_GET_CLASS(APICCommonClass, (obj), TYPE_APIC_COMMON)
DECLARE_OBJ_CHECKERS(APICCommonState, APICCommonClass,
APIC_COMMON, TYPE_APIC_COMMON)
struct APICCommonClass {
DeviceClass parent_class;

4
include/hw/i386/ich9.h
View file

@ -25,8 +25,8 @@ void ich9_generate_smi(void);
#define TYPE_ICH9_LPC_DEVICE "ICH9-LPC"
typedef struct ICH9LPCState ICH9LPCState;
#define ICH9_LPC_DEVICE(obj) \
OBJECT_CHECK(ICH9LPCState, (obj), TYPE_ICH9_LPC_DEVICE)
DECLARE_INSTANCE_CHECKER(ICH9LPCState, ICH9_LPC_DEVICE,
TYPE_ICH9_LPC_DEVICE)
struct ICH9LPCState {
/* ICH9 LPC PCI to ISA bridge */

4
include/hw/i386/intel_iommu.h
View file

@ -28,8 +28,8 @@
#define TYPE_INTEL_IOMMU_DEVICE "intel-iommu"
typedef struct IntelIOMMUState IntelIOMMUState;
#define INTEL_IOMMU_DEVICE(obj) \
OBJECT_CHECK(IntelIOMMUState, (obj), TYPE_INTEL_IOMMU_DEVICE)
DECLARE_INSTANCE_CHECKER(IntelIOMMUState, INTEL_IOMMU_DEVICE,
TYPE_INTEL_IOMMU_DEVICE)
#define TYPE_INTEL_IOMMU_MEMORY_REGION "intel-iommu-iommu-memory-region"

8
include/hw/i386/ioapic_internal.h
View file

@ -86,12 +86,8 @@ typedef struct IOAPICCommonState IOAPICCommonState;
#define TYPE_IOAPIC_COMMON "ioapic-common"
typedef struct IOAPICCommonClass IOAPICCommonClass;
#define IOAPIC_COMMON(obj) \
OBJECT_CHECK(IOAPICCommonState, (obj), TYPE_IOAPIC_COMMON)
#define IOAPIC_COMMON_CLASS(klass) \
OBJECT_CLASS_CHECK(IOAPICCommonClass, (klass), TYPE_IOAPIC_COMMON)
#define IOAPIC_COMMON_GET_CLASS(obj) \
OBJECT_GET_CLASS(IOAPICCommonClass, (obj), TYPE_IOAPIC_COMMON)
DECLARE_OBJ_CHECKERS(IOAPICCommonState, IOAPICCommonClass,
IOAPIC_COMMON, TYPE_IOAPIC_COMMON)
struct IOAPICCommonClass {
SysBusDeviceClass parent_class;

8
include/hw/i386/microvm.h
View file

@ -64,11 +64,7 @@ struct MicrovmMachineState {
typedef struct MicrovmMachineState MicrovmMachineState;
#define TYPE_MICROVM_MACHINE MACHINE_TYPE_NAME("microvm")
#define MICROVM_MACHINE(obj) \
OBJECT_CHECK(MicrovmMachineState, (obj), TYPE_MICROVM_MACHINE)
#define MICROVM_MACHINE_GET_CLASS(obj) \
OBJECT_GET_CLASS(MicrovmMachineClass, obj, TYPE_MICROVM_MACHINE)
#define MICROVM_MACHINE_CLASS(class) \
OBJECT_CLASS_CHECK(MicrovmMachineClass, class, TYPE_MICROVM_MACHINE)
DECLARE_OBJ_CHECKERS(MicrovmMachineState, MicrovmMachineClass,
MICROVM_MACHINE, TYPE_MICROVM_MACHINE)
#endif

8
include/hw/i386/pc.h
View file

@ -123,12 +123,8 @@ struct PCMachineClass {
typedef struct PCMachineClass PCMachineClass;
#define TYPE_PC_MACHINE "generic-pc-machine"
#define PC_MACHINE(obj) \
OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
#define PC_MACHINE_GET_CLASS(obj) \
OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
#define PC_MACHINE_CLASS(klass) \
OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
DECLARE_OBJ_CHECKERS(PCMachineState, PCMachineClass,
PC_MACHINE, TYPE_PC_MACHINE)
/* ioapic.c */

8
include/hw/i386/x86-iommu.h
View file

@ -28,12 +28,8 @@
#define TYPE_X86_IOMMU_DEVICE ("x86-iommu")
typedef struct X86IOMMUClass X86IOMMUClass;
typedef struct X86IOMMUState X86IOMMUState;
#define X86_IOMMU_DEVICE(obj) \
OBJECT_CHECK(X86IOMMUState, (obj), TYPE_X86_IOMMU_DEVICE)
#define X86_IOMMU_DEVICE_CLASS(klass) \
OBJECT_CLASS_CHECK(X86IOMMUClass, (klass), TYPE_X86_IOMMU_DEVICE)
#define X86_IOMMU_DEVICE_GET_CLASS(obj) \
OBJECT_GET_CLASS(X86IOMMUClass, obj, TYPE_X86_IOMMU_DEVICE)
DECLARE_OBJ_CHECKERS(X86IOMMUState, X86IOMMUClass,
X86_IOMMU_DEVICE, TYPE_X86_IOMMU_DEVICE)
#define X86_IOMMU_SID_INVALID (0xffff)

8
include/hw/i386/x86.h
View file

@ -77,12 +77,8 @@ typedef struct X86MachineState X86MachineState;
#define X86_MACHINE_ACPI "acpi"
#define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86")
#define X86_MACHINE(obj) \
OBJECT_CHECK(X86MachineState, (obj), TYPE_X86_MACHINE)
#define X86_MACHINE_GET_CLASS(obj) \
OBJECT_GET_CLASS(X86MachineClass, obj, TYPE_X86_MACHINE)
#define X86_MACHINE_CLASS(class) \
OBJECT_CLASS_CHECK(X86MachineClass, class, TYPE_X86_MACHINE)
DECLARE_OBJ_CHECKERS(X86MachineState, X86MachineClass,
X86_MACHINE, TYPE_X86_MACHINE)
void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms);

11
include/hw/ide/ahci.h
View file

@ -54,15 +54,16 @@ typedef struct AHCIState {
typedef struct AHCIPCIState AHCIPCIState;
#define TYPE_ICH9_AHCI "ich9-ahci"
#define ICH_AHCI(obj) \
OBJECT_CHECK(AHCIPCIState, (obj), TYPE_ICH9_AHCI)
DECLARE_INSTANCE_CHECKER(AHCIPCIState, ICH_AHCI,
TYPE_ICH9_AHCI)
int32_t ahci_get_num_ports(PCIDevice *dev);
void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd);
#define TYPE_SYSBUS_AHCI "sysbus-ahci"
typedef struct SysbusAHCIState SysbusAHCIState;
#define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI)
DECLARE_INSTANCE_CHECKER(SysbusAHCIState, SYSBUS_AHCI,
TYPE_SYSBUS_AHCI)
struct SysbusAHCIState {
/*< private >*/
@ -75,8 +76,8 @@ struct SysbusAHCIState {
#define TYPE_ALLWINNER_AHCI "allwinner-ahci"
typedef struct AllwinnerAHCIState AllwinnerAHCIState;
#define ALLWINNER_AHCI(obj) \
OBJECT_CHECK(AllwinnerAHCIState, (obj), TYPE_ALLWINNER_AHCI)
DECLARE_INSTANCE_CHECKER(AllwinnerAHCIState, ALLWINNER_AHCI,
TYPE_ALLWINNER_AHCI)
#define ALLWINNER_AHCI_MMIO_OFF 0x80
#define ALLWINNER_AHCI_MMIO_SIZE 0x80

11
include/hw/ide/internal.h
View file

@ -26,7 +26,8 @@ typedef struct IDEDMA IDEDMA;
typedef struct IDEDMAOps IDEDMAOps;
#define TYPE_IDE_BUS "IDE"
#define IDE_BUS(obj) OBJECT_CHECK(IDEBus, (obj), TYPE_IDE_BUS)
DECLARE_INSTANCE_CHECKER(IDEBus, IDE_BUS,
TYPE_IDE_BUS)
#define MAX_IDE_DEVS 2
@ -488,12 +489,8 @@ struct IDEBus {
#define TYPE_IDE_DEVICE "ide-device"
typedef struct IDEDeviceClass IDEDeviceClass;
#define IDE_DEVICE(obj) \
OBJECT_CHECK(IDEDevice, (obj), TYPE_IDE_DEVICE)
#define IDE_DEVICE_CLASS(klass) \
OBJECT_CLASS_CHECK(IDEDeviceClass, (klass), TYPE_IDE_DEVICE)
#define IDE_DEVICE_GET_CLASS(obj) \
OBJECT_GET_CLASS(IDEDeviceClass, (obj), TYPE_IDE_DEVICE)
DECLARE_OBJ_CHECKERS(IDEDevice, IDEDeviceClass,
IDE_DEVICE, TYPE_IDE_DEVICE)
struct IDEDeviceClass {
DeviceClass parent_class;

3
include/hw/ide/pci.h
View file

@ -41,7 +41,8 @@ typedef struct BMDMAState {
#define TYPE_PCI_IDE "pci-ide"
typedef struct PCIIDEState PCIIDEState;
#define PCI_IDE(obj) OBJECT_CHECK(PCIIDEState, (obj), TYPE_PCI_IDE)
DECLARE_INSTANCE_CHECKER(PCIIDEState, PCI_IDE,
TYPE_PCI_IDE)
struct PCIIDEState {
/*< private >*/

10
include/hw/input/adb.h
View file

@ -44,7 +44,8 @@ typedef bool ADBDeviceHasData(ADBDevice *d);
#define TYPE_ADB_DEVICE "adb-device"
typedef struct ADBDeviceClass ADBDeviceClass;
#define ADB_DEVICE(obj) OBJECT_CHECK(ADBDevice, (obj), TYPE_ADB_DEVICE)
DECLARE_OBJ_CHECKERS(ADBDevice, ADBDeviceClass,
ADB_DEVICE, TYPE_ADB_DEVICE)
struct ADBDevice {
/*< private >*/
@ -55,10 +56,6 @@ struct ADBDevice {
int handler;
};
#define ADB_DEVICE_CLASS(cls) \
OBJECT_CLASS_CHECK(ADBDeviceClass, (cls), TYPE_ADB_DEVICE)
#define ADB_DEVICE_GET_CLASS(obj) \
OBJECT_GET_CLASS(ADBDeviceClass, (obj), TYPE_ADB_DEVICE)
struct ADBDeviceClass {
/*< private >*/
@ -70,7 +67,8 @@ struct ADBDeviceClass {
};
#define TYPE_ADB_BUS "apple-desktop-bus"
#define ADB_BUS(obj) OBJECT_CHECK(ADBBusState, (obj), TYPE_ADB_BUS)
DECLARE_INSTANCE_CHECKER(ADBBusState, ADB_BUS,
TYPE_ADB_BUS)
#define ADB_STATUS_BUSTIMEOUT 0x1
#define ADB_STATUS_POLLREPLY 0x2

3
include/hw/input/i8042.h
View file

@ -13,7 +13,8 @@
#define TYPE_I8042 "i8042"
typedef struct ISAKBDState ISAKBDState;
#define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042)
DECLARE_INSTANCE_CHECKER(ISAKBDState, I8042,
TYPE_I8042)
#define I8042_A20_LINE "a20"

3
include/hw/intc/allwinner-a10-pic.h
View file

@ -6,7 +6,8 @@
#define TYPE_AW_A10_PIC "allwinner-a10-pic"
typedef struct AwA10PICState AwA10PICState;
#define AW_A10_PIC(obj) OBJECT_CHECK(AwA10PICState, (obj), TYPE_AW_A10_PIC)
DECLARE_INSTANCE_CHECKER(AwA10PICState, AW_A10_PIC,
TYPE_AW_A10_PIC)
#define AW_A10_PIC_VECTOR 0
#define AW_A10_PIC_BASE_ADDR 4

8
include/hw/intc/arm_gic_common.h
View file

@ -149,12 +149,8 @@ typedef struct GICState GICState;
#define TYPE_ARM_GIC_COMMON "arm_gic_common"
typedef struct ARMGICCommonClass ARMGICCommonClass;
#define ARM_GIC_COMMON(obj) \
OBJECT_CHECK(GICState, (obj), TYPE_ARM_GIC_COMMON)
#define ARM_GIC_COMMON_CLASS(klass) \
OBJECT_CLASS_CHECK(ARMGICCommonClass, (klass), TYPE_ARM_GIC_COMMON)
#define ARM_GIC_COMMON_GET_CLASS(obj) \
OBJECT_GET_CLASS(ARMGICCommonClass, (obj), TYPE_ARM_GIC_COMMON)
DECLARE_OBJ_CHECKERS(GICState, ARMGICCommonClass,
ARM_GIC_COMMON, TYPE_ARM_GIC_COMMON)
struct ARMGICCommonClass {
/*< private >*/

8
include/hw/intc/arm_gicv3_common.h
View file

@ -281,12 +281,8 @@ GICV3_BITMAP_ACCESSORS(edge_trigger)
#define TYPE_ARM_GICV3_COMMON "arm-gicv3-common"
typedef struct ARMGICv3CommonClass ARMGICv3CommonClass;
#define ARM_GICV3_COMMON(obj) \
OBJECT_CHECK(GICv3State, (obj), TYPE_ARM_GICV3_COMMON)
#define ARM_GICV3_COMMON_CLASS(klass) \
OBJECT_CLASS_CHECK(ARMGICv3CommonClass, (klass), TYPE_ARM_GICV3_COMMON)
#define ARM_GICV3_COMMON_GET_CLASS(obj) \
OBJECT_GET_CLASS(ARMGICv3CommonClass, (obj), TYPE_ARM_GICV3_COMMON)
DECLARE_OBJ_CHECKERS(GICv3State, ARMGICv3CommonClass,
ARM_GICV3_COMMON, TYPE_ARM_GICV3_COMMON)
struct ARMGICv3CommonClass {
/*< private >*/

8
include/hw/intc/arm_gicv3_its_common.h
View file

@ -66,12 +66,8 @@ void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops);
#define TYPE_ARM_GICV3_ITS_COMMON "arm-gicv3-its-common"
typedef struct GICv3ITSCommonClass GICv3ITSCommonClass;
#define ARM_GICV3_ITS_COMMON(obj) \
OBJECT_CHECK(GICv3ITSState, (obj), TYPE_ARM_GICV3_ITS_COMMON)
#define ARM_GICV3_ITS_COMMON_CLASS(klass) \
OBJECT_CLASS_CHECK(GICv3ITSCommonClass, (klass), TYPE_ARM_GICV3_ITS_COMMON)
#define ARM_GICV3_ITS_COMMON_GET_CLASS(obj) \
OBJECT_GET_CLASS(GICv3ITSCommonClass, (obj), TYPE_ARM_GICV3_ITS_COMMON)
DECLARE_OBJ_CHECKERS(GICv3ITSState, GICv3ITSCommonClass,
ARM_GICV3_ITS_COMMON, TYPE_ARM_GICV3_ITS_COMMON)
struct GICv3ITSCommonClass {
/*< private >*/

4
include/hw/intc/armv7m_nvic.h
View file

@ -18,8 +18,8 @@
#define TYPE_NVIC "armv7m_nvic"
typedef struct NVICState NVICState;
#define NVIC(obj) \
OBJECT_CHECK(NVICState, (obj), TYPE_NVIC)
DECLARE_INSTANCE_CHECKER(NVICState, NVIC,
TYPE_NVIC)
/* Highest permitted number of exceptions (architectural limit) */
#define NVIC_MAX_VECTORS 512

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