motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-03 15:53:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

Implement sun4u PCI IRQ routing.

Browse source 
Allow multiple PCI busses and PCI-PCI bridges.
Fix bugs in Versatile PCI implementation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2166 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
pbrook 2006-09-24 17:01:44 +00:00
parent d2b5931756
commit 80b3ada7dd
8 changed files with 146 additions and 39 deletions
Download patch file Download diff file Expand all files Collapse all files

8
hw/versatile_pci.c
View file

@ -11,7 +11,7 @@
static inline uint32_t vpb_pci_config_addr(target_phys_addr_t addr)
{
return addr & 0xf8ff;
return addr & 0xffffff;
}
static void pci_vpb_config_writeb (void *opaque, target_phys_addr_t addr,
@ -105,15 +105,15 @@ PCIBus *pci_vpb_init(void *pic, int irq, int realview)
base = 0x40000000;
name = "Versatile/PB PCI Controller";
}
s = pci_register_bus(pci_vpb_set_irq, pci_vpb_map_irq, pic, 11 << 3);
s = pci_register_bus(pci_vpb_set_irq, pci_vpb_map_irq, pic, 11 << 3, 4);
/* ??? Register memory space. */
mem_config = cpu_register_io_memory(0, pci_vpb_config_read,
pci_vpb_config_write, s);
/* Selfconfig area. */
cpu_register_physical_memory(base + 0x01000000, 0x10000, mem_config);
cpu_register_physical_memory(base + 0x01000000, 0x1000000, mem_config);
/* Normal config area. */
cpu_register_physical_memory(base + 0x02000000, 0x10000, mem_config);
cpu_register_physical_memory(base + 0x02000000, 0x1000000, mem_config);
d = pci_register_device(s, name, sizeof(PCIDevice), -1, NULL, NULL);