motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-09 02:24:58 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

ppc/pnv: remove pnv-phb3-root-port

Browse source 
The unified pnv-phb-root-port can be used in its place. There is no ABI
breakage in doing so because no official QEMU release introduced user
creatable pnv-phb3-root-port devices.

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220624084921.399219-8-danielhb413@gmail.com>
This commit is contained in:
Daniel Henrique Barboza 2022-06-24 05:49:16 -03:00
parent 5ba76b61a2
commit 805150619e
4 changed files with 2 additions and 49 deletions
Download patch file Download diff file Expand all files Collapse all files

2
hw/pci-host/pnv_phb.c
View file

@ -34,7 +34,7 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp)
switch (phb->version) { switch (phb->version) {
case 3: case 3:
phb_typename = g_strdup(TYPE_PNV_PHB3); phb_typename = g_strdup(TYPE_PNV_PHB3);
phb_rootport_typename = g_strdup(TYPE_PNV_PHB3_ROOT_PORT); phb_rootport_typename = g_strdup(TYPE_PNV_PHB_ROOT_PORT);
break; break;
case 4: case 4:
phb_typename = g_strdup(TYPE_PNV_PHB4); phb_typename = g_strdup(TYPE_PNV_PHB4);

42
hw/pci-host/pnv_phb3.c
View file

@ -1122,51 +1122,9 @@ static const TypeInfo pnv_phb3_root_bus_info = {
.class_init = pnv_phb3_root_bus_class_init, .class_init = pnv_phb3_root_bus_class_init,
}; };
static void pnv_phb3_root_port_realize(DeviceState *dev, Error **errp)
{
PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev);
PCIDevice *pci = PCI_DEVICE(dev);
Error *local_err = NULL;
rpc->parent_realize(dev, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
pci_config_set_interrupt_pin(pci->config, 0);
}
static void pnv_phb3_root_port_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass);
dc->desc = "IBM PHB3 PCIE Root Port";
device_class_set_parent_realize(dc, pnv_phb3_root_port_realize,
&rpc->parent_realize);
dc->user_creatable = false;
k->vendor_id = PCI_VENDOR_ID_IBM;
k->device_id = 0x03dc;
k->revision = 0;
rpc->exp_offset = 0x48;
rpc->aer_offset = 0x100;
}
static const TypeInfo pnv_phb3_root_port_info = {
.name = TYPE_PNV_PHB3_ROOT_PORT,
.parent = TYPE_PCIE_ROOT_PORT,
.instance_size = sizeof(PnvPHB3RootPort),
.class_init = pnv_phb3_root_port_class_init,
};
static void pnv_phb3_register_types(void) static void pnv_phb3_register_types(void)
{ {
type_register_static(&pnv_phb3_root_bus_info); type_register_static(&pnv_phb3_root_bus_info);
type_register_static(&pnv_phb3_root_port_info);
type_register_static(&pnv_phb3_type_info); type_register_static(&pnv_phb3_type_info);
type_register_static(&pnv_phb3_iommu_memory_region_info); type_register_static(&pnv_phb3_iommu_memory_region_info);
} }

1
hw/ppc/pnv.c
View file

@ -2129,6 +2129,7 @@ static void pnv_machine_power8_class_init(ObjectClass *oc, void *data)
static GlobalProperty phb_compat[] = { static GlobalProperty phb_compat[] = {
{ TYPE_PNV_PHB, "version", "3" }, { TYPE_PNV_PHB, "version", "3" },
{ TYPE_PNV_PHB_ROOT_PORT, "version", "3" },
}; };
mc->desc = "IBM PowerNV (Non-Virtualized) POWER8"; mc->desc = "IBM PowerNV (Non-Virtualized) POWER8";

6
include/hw/pci-host/pnv_phb3.h
View file

@ -108,12 +108,6 @@ struct PnvPBCQState {
*/ */
#define TYPE_PNV_PHB3_ROOT_BUS "pnv-phb3-root" #define TYPE_PNV_PHB3_ROOT_BUS "pnv-phb3-root"
#define TYPE_PNV_PHB3_ROOT_PORT "pnv-phb3-root-port"
typedef struct PnvPHB3RootPort {
PCIESlot parent_obj;
} PnvPHB3RootPort;
/* /*
* PHB3 PCIe Host Bridge for PowerNV machines (POWER8) * PHB3 PCIe Host Bridge for PowerNV machines (POWER8)
*/ */