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target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction

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For the A64 instruction set, the semihosting call instruction
is 'HLT 0xf000'. Wire this up to call do_arm_semihosting()
if semihosting is enabled.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christopher Covington <christopher.covington@linaro.org>
Tested-by: Christopher Covington <cov@codeaurora.org>
Message-id: 1439483745-28752-10-git-send-email-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2015-09-07 10:39:28 +01:00
parent 7446d35e1d
commit 8012c84ff9
5 changed files with 34 additions and 2 deletions
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6
target-arm/helper-a64.c
View file

@ -514,6 +514,12 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
case EXCP_VFIQ:
addr += 0x100;
break;
case EXCP_SEMIHOST:
qemu_log_mask(CPU_LOG_INT,
"...handling as semihosting call 0x%" PRIx64 "\n",
env->xregs[0]);
env->xregs[0] = do_arm_semihosting(env);
return;
default:
cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index);
}