target/arm: Use tlb_set_page_full

Adjust GetPhysAddrResult to fill in CPUTLBEntryFull,
so that it may be passed directly to tlb_set_page_full.

The change is large, but mostly mechanical.  The major
non-mechanical change is page_size -> lg_page_size.
Most of the time this is obvious, and is related to
TARGET_PAGE_BITS.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20221001162318.153420-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-10-01 09:22:56 -07:00 committed by Peter Maydell
parent 5b74f9b4ed
commit 7fa7ea8f48
5 changed files with 111 additions and 114 deletions

View file

@ -3323,8 +3323,8 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
/* Create a 64-bit PAR */
par64 = (1 << 11); /* LPAE bit always set */
if (!ret) {
par64 |= res.phys & ~0xfffULL;
if (!res.attrs.secure) {
par64 |= res.f.phys_addr & ~0xfffULL;
if (!res.f.attrs.secure) {
par64 |= (1 << 9); /* NS */
}
par64 |= (uint64_t)res.cacheattrs.attrs << 56; /* ATTR */
@ -3348,13 +3348,13 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
*/
if (!ret) {
/* We do not set any attribute bits in the PAR */
if (res.page_size == (1 << 24)
if (res.f.lg_page_size == 24
&& arm_feature(env, ARM_FEATURE_V7)) {
par64 = (res.phys & 0xff000000) | (1 << 1);
par64 = (res.f.phys_addr & 0xff000000) | (1 << 1);
} else {
par64 = res.phys & 0xfffff000;
par64 = res.f.phys_addr & 0xfffff000;
}
if (!res.attrs.secure) {
if (!res.f.attrs.secure) {
par64 |= (1 << 9); /* NS */
}
} else {