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target/arm: Use tlb_set_page_full
Adjust GetPhysAddrResult to fill in CPUTLBEntryFull, so that it may be passed directly to tlb_set_page_full. The change is large, but mostly mechanical. The major non-mechanical change is page_size -> lg_page_size. Most of the time this is obvious, and is related to TARGET_PAGE_BITS. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20221001162318.153420-21-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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5 changed files with 111 additions and 114 deletions
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@ -3323,8 +3323,8 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
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/* Create a 64-bit PAR */
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par64 = (1 << 11); /* LPAE bit always set */
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if (!ret) {
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par64 |= res.phys & ~0xfffULL;
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if (!res.attrs.secure) {
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par64 |= res.f.phys_addr & ~0xfffULL;
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if (!res.f.attrs.secure) {
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par64 |= (1 << 9); /* NS */
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}
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par64 |= (uint64_t)res.cacheattrs.attrs << 56; /* ATTR */
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@ -3348,13 +3348,13 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
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*/
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if (!ret) {
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/* We do not set any attribute bits in the PAR */
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if (res.page_size == (1 << 24)
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if (res.f.lg_page_size == 24
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&& arm_feature(env, ARM_FEATURE_V7)) {
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par64 = (res.phys & 0xff000000) | (1 << 1);
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par64 = (res.f.phys_addr & 0xff000000) | (1 << 1);
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} else {
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par64 = res.phys & 0xfffff000;
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par64 = res.f.phys_addr & 0xfffff000;
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}
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if (!res.attrs.secure) {
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if (!res.f.attrs.secure) {
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par64 |= (1 << 9); /* NS */
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}
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} else {
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