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target/arm: Implement SVE Floating Point Accumulating Reduction Group
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180627043328.11531-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -2811,6 +2811,62 @@ uint32_t HELPER(sve_while)(void *vd, uint32_t count, uint32_t pred_desc)
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return predtest_ones(d, oprsz, esz_mask);
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}
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uint64_t HELPER(sve_fadda_h)(uint64_t nn, void *vm, void *vg,
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void *status, uint32_t desc)
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{
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intptr_t i = 0, opr_sz = simd_oprsz(desc);
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float16 result = nn;
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do {
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uint16_t pg = *(uint16_t *)(vg + H1_2(i >> 3));
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do {
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if (pg & 1) {
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float16 mm = *(float16 *)(vm + H1_2(i));
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result = float16_add(result, mm, status);
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}
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i += sizeof(float16), pg >>= sizeof(float16);
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} while (i & 15);
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} while (i < opr_sz);
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return result;
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}
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uint64_t HELPER(sve_fadda_s)(uint64_t nn, void *vm, void *vg,
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void *status, uint32_t desc)
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{
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intptr_t i = 0, opr_sz = simd_oprsz(desc);
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float32 result = nn;
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do {
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uint16_t pg = *(uint16_t *)(vg + H1_2(i >> 3));
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do {
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if (pg & 1) {
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float32 mm = *(float32 *)(vm + H1_2(i));
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result = float32_add(result, mm, status);
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}
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i += sizeof(float32), pg >>= sizeof(float32);
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} while (i & 15);
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} while (i < opr_sz);
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return result;
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}
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uint64_t HELPER(sve_fadda_d)(uint64_t nn, void *vm, void *vg,
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void *status, uint32_t desc)
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{
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intptr_t i = 0, opr_sz = simd_oprsz(desc) / 8;
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uint64_t *m = vm;
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uint8_t *pg = vg;
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for (i = 0; i < opr_sz; i++) {
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if (pg[H1(i)] & 1) {
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nn = float64_add(nn, m[i], status);
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}
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}
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return nn;
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}
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/* Fully general three-operand expander, controlled by a predicate,
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* With the extra float_status parameter.
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*/
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