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target/mips: Use enum definitions from CPUMIPSMSADataFormat enum

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Replace magic DataFormat value by the corresponding
enum from CPUMIPSMSADataFormat.

Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211028210843.2120802-7-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2021-10-19 09:38:11 +02:00
parent 340ee8b3f1
commit 7e9db46d64
1 changed files with 3 additions and 3 deletions
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6
target/mips/tcg/msa_translate.c
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@ -1791,10 +1791,10 @@ static void gen_msa_3rf(DisasContext *ctx)
case OPC_MULR_Q_df: case OPC_MULR_Q_df:
case OPC_MADDR_Q_df: case OPC_MADDR_Q_df:
case OPC_MSUBR_Q_df: case OPC_MSUBR_Q_df:
tdf = tcg_constant_i32(df + 1); tdf = tcg_constant_i32(DF_HALF + df);
break; break;
default: default:
tdf = tcg_constant_i32(df + 2); tdf = tcg_constant_i32(DF_WORD + df);
break; break;
} }
@ -2023,7 +2023,7 @@ static void gen_msa_2rf(DisasContext *ctx)
TCGv_i32 twd = tcg_const_i32(wd); TCGv_i32 twd = tcg_const_i32(wd);
TCGv_i32 tws = tcg_const_i32(ws); TCGv_i32 tws = tcg_const_i32(ws);
/* adjust df value for floating-point instruction */ /* adjust df value for floating-point instruction */
TCGv_i32 tdf = tcg_constant_i32(df + 2); TCGv_i32 tdf = tcg_constant_i32(DF_WORD + df);
switch (MASK_MSA_2RF(ctx->opcode)) { switch (MASK_MSA_2RF(ctx->opcode)) {
case OPC_FCLASS_df: case OPC_FCLASS_df: