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tcg generic translate loop v15
-----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJZsBwXAAoJEGTfOOivfiFfst4IAIkgld9yabywTZc5KUvJmMc/ Zh8BoI+1L27NqcQiRAB2m82yFho8jKdk618dFp2KadXzhmKr6CDztsD6y0BPg7YW pBWakZ4Q/HpAIwkAKiKoXZ5+go13z3OSjYZxYCDZzokl0cgxfKshoN2RYVD0L1my SGPp2DuF2YgrNy0VHU7Ki+lW77f1wYPykDv6geb7NGI4ePUvSpoCLKdcoPmCQOut sFiRijkW6W2HB70Tfq+OJFBb2UqJEZzu1uDwP156FKWGDrzGyP0tclRnnmrHuder wxdUoiscz5Ow4J4oa9/CERRAR11S1aHF45ofwjf2VpuqyeZy98d4mX9GG4oVqEc= =ItTI -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/rth/tags/pull-tgt-20170906' into staging tcg generic translate loop v15 # gpg: Signature made Wed 06 Sep 2017 17:02:31 BST # gpg: using RSA key 0x64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tgt-20170906: (32 commits) target/arm: Perform per-insn cross-page check only for Thumb target/arm: Split out thumb_tr_translate_insn target/arm: Move ss check to init_disas_context target/arm: [a64] Move page and ss checks to init_disas_context target/arm: [tcg] Port to generic translation framework target/arm: [tcg,a64] Port to disas_log target/arm: [tcg] Port to disas_log target/arm: [tcg,a64] Port to tb_stop target/arm: [tcg] Port to tb_stop target/arm: [tcg,a64] Port to translate_insn target/arm: [tcg] Port to translate_insn target/arm: [tcg,a64] Port to breakpoint_check target/arm: [tcg,a64] Port to insn_start target/arm: [tcg] Port to insn_start target/arm: [tcg] Port to tb_start target/arm: [tcg,a64] Port to init_disas_context target/arm: [tcg] Port to init_disas_context target/arm: [tcg] Port to DisasContextBase target/i386: [tcg] Port to generic translation framework target/i386: [tcg] Port to disas_log ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
7e375e0442
17 changed files with 920 additions and 581 deletions
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@ -35,35 +35,6 @@ typedef abi_ulong tb_page_addr_t;
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typedef ram_addr_t tb_page_addr_t;
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#endif
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/* DisasContext is_jmp field values
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*
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* is_jmp starts as DISAS_NEXT. The translator will keep processing
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* instructions until an exit condition is reached. If we reach the
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* exit condition and is_jmp is still DISAS_NEXT (because of some
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* other condition) we simply "jump" to the next address.
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* The remaining exit cases are:
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*
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* DISAS_JUMP - Only the PC was modified dynamically (e.g computed)
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* DISAS_TB_JUMP - Only the PC was modified statically (e.g. branch)
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*
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* In these cases as long as the PC is updated we can chain to the
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* next TB either by exiting the loop or looking up the next TB via
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* the loookup helper.
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*
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* DISAS_UPDATE - CPU State was modified dynamically
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*
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* This covers any other CPU state which necessities us exiting the
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* TCG code to the main run-loop. Typically this includes anything
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* that might change the interrupt state.
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*
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* Individual translators may define additional exit cases to deal
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* with per-target special conditions.
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*/
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#define DISAS_NEXT 0 /* next instruction can be analyzed */
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#define DISAS_JUMP 1 /* only pc was modified dynamically */
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#define DISAS_TB_JUMP 2 /* only pc was modified statically */
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#define DISAS_UPDATE 3 /* cpu state was modified dynamically */
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#include "qemu/log.h"
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void gen_intermediate_code(CPUState *cpu, struct TranslationBlock *tb);
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144
include/exec/translator.h
Normal file
144
include/exec/translator.h
Normal file
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@ -0,0 +1,144 @@
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/*
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* Generic intermediate code generation.
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*
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* Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef EXEC__TRANSLATOR_H
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#define EXEC__TRANSLATOR_H
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/*
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* Include this header from a target-specific file, and add a
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*
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* DisasContextBase base;
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*
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* member in your target-specific DisasContext.
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*/
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#include "exec/exec-all.h"
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#include "tcg/tcg.h"
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/**
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* DisasJumpType:
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* @DISAS_NEXT: Next instruction in program order.
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* @DISAS_TOO_MANY: Too many instructions translated.
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* @DISAS_NORETURN: Following code is dead.
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* @DISAS_TARGET_*: Start of target-specific conditions.
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*
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* What instruction to disassemble next.
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*/
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typedef enum DisasJumpType {
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DISAS_NEXT,
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DISAS_TOO_MANY,
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DISAS_NORETURN,
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DISAS_TARGET_0,
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DISAS_TARGET_1,
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DISAS_TARGET_2,
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DISAS_TARGET_3,
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DISAS_TARGET_4,
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DISAS_TARGET_5,
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DISAS_TARGET_6,
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DISAS_TARGET_7,
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DISAS_TARGET_8,
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DISAS_TARGET_9,
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DISAS_TARGET_10,
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DISAS_TARGET_11,
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} DisasJumpType;
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/**
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* DisasContextBase:
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* @tb: Translation block for this disassembly.
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* @pc_first: Address of first guest instruction in this TB.
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* @pc_next: Address of next guest instruction in this TB (current during
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* disassembly).
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* @is_jmp: What instruction to disassemble next.
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* @num_insns: Number of translated instructions (including current).
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* @singlestep_enabled: "Hardware" single stepping enabled.
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*
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* Architecture-agnostic disassembly context.
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*/
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typedef struct DisasContextBase {
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TranslationBlock *tb;
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target_ulong pc_first;
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target_ulong pc_next;
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DisasJumpType is_jmp;
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unsigned int num_insns;
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bool singlestep_enabled;
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} DisasContextBase;
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/**
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* TranslatorOps:
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* @init_disas_context:
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* Initialize the target-specific portions of DisasContext struct.
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* The generic DisasContextBase has already been initialized.
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* Return max_insns, modified as necessary by db->tb->flags.
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*
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* @tb_start:
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* Emit any code required before the start of the main loop,
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* after the generic gen_tb_start().
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*
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* @insn_start:
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* Emit the tcg_gen_insn_start opcode.
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*
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* @breakpoint_check:
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* When called, the breakpoint has already been checked to match the PC,
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* but the target may decide the breakpoint missed the address
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* (e.g., due to conditions encoded in their flags). Return true to
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* indicate that the breakpoint did hit, in which case no more breakpoints
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* are checked. If the breakpoint did hit, emit any code required to
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* signal the exception, and set db->is_jmp as necessary to terminate
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* the main loop.
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*
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* @translate_insn:
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* Disassemble one instruction and set db->pc_next for the start
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* of the following instruction. Set db->is_jmp as necessary to
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* terminate the main loop.
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*
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* @tb_stop:
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* Emit any opcodes required to exit the TB, based on db->is_jmp.
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*
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* @disas_log:
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* Print instruction disassembly to log.
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*/
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typedef struct TranslatorOps {
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int (*init_disas_context)(DisasContextBase *db, CPUState *cpu,
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int max_insns);
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void (*tb_start)(DisasContextBase *db, CPUState *cpu);
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void (*insn_start)(DisasContextBase *db, CPUState *cpu);
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bool (*breakpoint_check)(DisasContextBase *db, CPUState *cpu,
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const CPUBreakpoint *bp);
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void (*translate_insn)(DisasContextBase *db, CPUState *cpu);
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void (*tb_stop)(DisasContextBase *db, CPUState *cpu);
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void (*disas_log)(const DisasContextBase *db, CPUState *cpu);
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} TranslatorOps;
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/**
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* translator_loop:
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* @ops: Target-specific operations.
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* @db: Disassembly context.
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* @cpu: Target vCPU.
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* @tb: Translation block.
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*
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* Generic translator loop.
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*
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* Translation will stop in the following cases (in order):
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* - When is_jmp set by #TranslatorOps::breakpoint_check.
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* - set to DISAS_TOO_MANY exits after translating one more insn
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* - set to any other value than DISAS_NEXT exits immediately.
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* - When is_jmp set by #TranslatorOps::translate_insn.
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* - set to any value other than DISAS_NEXT exits immediately.
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* - When the TCG operation buffer is full.
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* - When single-stepping is enabled (system-wide or on the current vCPU).
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* - When too many instructions have been translated.
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*/
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void translator_loop(const TranslatorOps *ops, DisasContextBase *db,
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CPUState *cpu, TranslationBlock *tb);
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void translator_loop_temp_check(DisasContextBase *db);
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#endif /* EXEC__TRANSLATOR_H */
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