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target-arm: Handle UNDEF cases for Neon invalid modified-immediates
For Neon "one register and a modified immediate value" forms, the combination op=1 cmode=1111 is unallocated and should UNDEF. All instructions of this form also UNDEF if Q == 1 and Vd<0> == 1. We also add a comment on the only UNPREDICTABLE in this space. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -5084,11 +5084,18 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
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}
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}
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} else { /* (insn & 0x00380080) == 0 */
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} else { /* (insn & 0x00380080) == 0 */
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int invert;
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int invert;
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if (q && (rd & 1)) {
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return 1;
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}
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op = (insn >> 8) & 0xf;
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op = (insn >> 8) & 0xf;
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/* One register and immediate. */
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/* One register and immediate. */
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imm = (u << 7) | ((insn >> 12) & 0x70) | (insn & 0xf);
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imm = (u << 7) | ((insn >> 12) & 0x70) | (insn & 0xf);
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invert = (insn & (1 << 5)) != 0;
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invert = (insn & (1 << 5)) != 0;
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/* Note that op = 2,3,4,5,6,7,10,11,12,13 imm=0 is UNPREDICTABLE.
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* We choose to not special-case this and will behave as if a
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* valid constant encoding of 0 had been given.
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*/
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switch (op) {
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switch (op) {
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case 0: case 1:
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case 0: case 1:
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/* no-op */
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/* no-op */
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@ -5120,6 +5127,9 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
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imm = ~imm;
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imm = ~imm;
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break;
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break;
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case 15:
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case 15:
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if (invert) {
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return 1;
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}
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imm = ((imm & 0x80) << 24) | ((imm & 0x3f) << 19)
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imm = ((imm & 0x80) << 24) | ((imm & 0x3f) << 19)
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| ((imm & 0x40) ? (0x1f << 25) : (1 << 30));
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| ((imm & 0x40) ? (0x1f << 25) : (1 << 30));
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break;
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break;
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