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Patch queue for ppc - 2015-07-07

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A few last minute PPC changes for 2.4:
 
   - spapr: Update SLOF
   - spapr: Fix a few bugs
   - spapr: Preparation for hotplug
   - spapr: Minor code cleanups
   - linux-user: Add mftb handling
   - kvm: Enable hugepage support with memory-backend-file
   - mac99: Remove nonexistent interrupt pin (Mac OS 9 fix)
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Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' into staging

Patch queue for ppc - 2015-07-07

A few last minute PPC changes for 2.4:

  - spapr: Update SLOF
  - spapr: Fix a few bugs
  - spapr: Preparation for hotplug
  - spapr: Minor code cleanups
  - linux-user: Add mftb handling
  - kvm: Enable hugepage support with memory-backend-file
  - mac99: Remove nonexistent interrupt pin (Mac OS 9 fix)

# gpg: Signature made Tue Jul  7 16:48:41 2015 BST using RSA key ID 03FEDC60
# gpg: Good signature from "Alexander Graf <agraf@suse.de>"
# gpg:                 aka "Alexander Graf <alex@csgraf.de>"

* remotes/agraf/tags/signed-ppc-for-upstream: (30 commits)
  sPAPR: Clear stale MSIx table during EEH reset
  sPAPR: Reenable EEH functionality on reboot
  sPAPR: Don't enable EEH on emulated PCI devices
  spapr-vty: Use TYPE_ definition instead of hardcoding
  spapr_vty: lookup should only return valid VTY objects
  spapr_pci: drop redundant args in spapr_[populate, create]_pci_child_dt
  spapr_pci: populate ibm,loc-code
  spapr_pci: enumerate and add PCI device tree
  xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled
  ppc: Update cpu_model in MachineState
  spapr: Consolidate cpu init code into a routine
  spapr: Reorganize CPU dt generation code
  cpus: Add a macro to walk CPUs in reverse
  spapr: Support ibm, lrdr-capacity device tree property
  spapr: Consider max_cpus during xics initialization
  Revert "hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*)"
  spapr_iommu: translate sPAPRTCEAccess to IOMMUAccessFlags
  spapr_iommu: drop erroneous check in h_put_tce_indirect()
  spapr_pci: set device node unit address as hex
  spapr_pci: encode class code including Prog IF register
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2015-07-07 21:16:06 +01:00
commit 7ce0f7dc87
31 changed files with 836 additions and 411 deletions
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18
docs/specs/ppc-spapr-hotplug.txt
View file

@ -284,4 +284,22 @@ struct rtas_event_log_v6_hp {
} drc;
} QEMU_PACKED;
== ibm,lrdr-capacity ==
ibm,lrdr-capacity is a property in the /rtas device tree node that identifies
the dynamic reconfiguration capabilities of the guest. It consists of a triple
consisting of <phys>, <size> and <maxcpus>.
<phys>, encoded in BE format represents the maximum address in bytes and
hence the maximum memory that can be allocated to the guest.
<size>, encoded in BE format represents the size increments in which
memory can be hot-plugged to the guest.
<maxcpus>, a BE-encoded integer, represents the maximum number of
processors that the guest can have.
pseries guests use this property to note the maximum allowed CPUs for the
guest.
[1] http://thread.gmane.org/gmane.linux.ports.ppc.embedded/75350/focus=106867