hw/intc: Move mtimer/mtimecmp to aclint

Historically, The mtime/mtimecmp has been part of the CPU because
they are per hart entities. However, they actually belong to aclint
which is a MMIO device.

Move them to the ACLINT device. This also emulates the real hardware
more closely.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Message-Id: <20220824221357.41070-2-atishp@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Atish Patra 2022-08-24 15:13:55 -07:00 committed by Alistair Francis
parent dc9acc9ce4
commit 7cbcc538f4
6 changed files with 47 additions and 30 deletions

View file

@ -60,8 +60,6 @@ static uint64_t cpu_riscv_read_rtc(uint32_t timebase_freq)
static void ibex_timer_update_irqs(IbexTimerState *s)
{
CPUState *cs = qemu_get_cpu(0);
RISCVCPU *cpu = RISCV_CPU(cs);
uint64_t value = s->timer_compare_lower0 |
((uint64_t)s->timer_compare_upper0 << 32);
uint64_t next, diff;
@ -73,9 +71,9 @@ static void ibex_timer_update_irqs(IbexTimerState *s)
}
/* Update the CPUs mtimecmp */
cpu->env.timecmp = value;
s->mtimecmp = value;
if (cpu->env.timecmp <= now) {
if (s->mtimecmp <= now) {
/*
* If the mtimecmp was in the past raise the interrupt now.
*/
@ -91,7 +89,7 @@ static void ibex_timer_update_irqs(IbexTimerState *s)
qemu_irq_lower(s->m_timer_irq);
qemu_set_irq(s->irq, false);
diff = cpu->env.timecmp - now;
diff = s->mtimecmp - now;
next = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
muldiv64(diff,
NANOSECONDS_PER_SECOND,
@ -99,9 +97,9 @@ static void ibex_timer_update_irqs(IbexTimerState *s)
if (next < qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)) {
/* We overflowed the timer, just set it as large as we can */
timer_mod(cpu->env.timer, 0x7FFFFFFFFFFFFFFF);
timer_mod(s->mtimer, 0x7FFFFFFFFFFFFFFF);
} else {
timer_mod(cpu->env.timer, next);
timer_mod(s->mtimer, next);
}
}
@ -120,11 +118,9 @@ static void ibex_timer_reset(DeviceState *dev)
{
IbexTimerState *s = IBEX_TIMER(dev);
CPUState *cpu = qemu_get_cpu(0);
CPURISCVState *env = cpu->env_ptr;
env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
s->mtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
&ibex_timer_cb, s);
env->timecmp = 0;
s->mtimecmp = 0;
s->timer_ctrl = 0x00000000;
s->timer_cfg0 = 0x00010000;