target/m68k: Avoid tcg_const_i32 in bfop_reg

Tidy up the whole function, hoisting is_bfffo as a common test
for whether tlen and tofs needed. Use tcg_constant_i32, and load
a separate temporary for mask.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-25 15:37:18 -10:00
parent b32a07d42d
commit 7b346e4673

View file

@ -4027,14 +4027,8 @@ DISAS_INSN(bfop_reg)
TCGv src = DREG(insn, 0); TCGv src = DREG(insn, 0);
int len = ((extract32(ext, 0, 5) - 1) & 31) + 1; int len = ((extract32(ext, 0, 5) - 1) & 31) + 1;
int ofs = extract32(ext, 6, 5); /* big bit-endian */ int ofs = extract32(ext, 6, 5); /* big bit-endian */
TCGv mask, tofs, tlen; TCGv mask, tofs = NULL, tlen = NULL;
bool is_bfffo = (insn & 0x0f00) == 0x0d00;
tofs = NULL;
tlen = NULL;
if ((insn & 0x0f00) == 0x0d00) { /* bfffo */
tofs = tcg_temp_new();
tlen = tcg_temp_new();
}
if ((ext & 0x820) == 0) { if ((ext & 0x820) == 0) {
/* Immediate width and offset. */ /* Immediate width and offset. */
@ -4045,45 +4039,49 @@ DISAS_INSN(bfop_reg)
tcg_gen_rotli_i32(QREG_CC_N, src, ofs); tcg_gen_rotli_i32(QREG_CC_N, src, ofs);
} }
tcg_gen_andi_i32(QREG_CC_N, QREG_CC_N, ~maski); tcg_gen_andi_i32(QREG_CC_N, QREG_CC_N, ~maski);
mask = tcg_const_i32(ror32(maski, ofs));
if (tofs) { mask = tcg_constant_i32(ror32(maski, ofs));
tcg_gen_movi_i32(tofs, ofs); if (is_bfffo) {
tcg_gen_movi_i32(tlen, len); tofs = tcg_constant_i32(ofs);
tlen = tcg_constant_i32(len);
} }
} else { } else {
TCGv tmp = tcg_temp_new(); TCGv tmp = tcg_temp_new();
mask = tcg_temp_new();
if (ext & 0x20) { if (ext & 0x20) {
/* Variable width */ /* Variable width */
tcg_gen_subi_i32(tmp, DREG(ext, 0), 1); tcg_gen_subi_i32(tmp, DREG(ext, 0), 1);
tcg_gen_andi_i32(tmp, tmp, 31); tcg_gen_andi_i32(tmp, tmp, 31);
mask = tcg_const_i32(0x7fffffffu); tcg_gen_shr_i32(mask, tcg_constant_i32(0x7fffffffu), tmp);
tcg_gen_shr_i32(mask, mask, tmp); if (is_bfffo) {
if (tlen) { tlen = tcg_temp_new();
tcg_gen_addi_i32(tlen, tmp, 1); tcg_gen_addi_i32(tlen, tmp, 1);
} }
} else { } else {
/* Immediate width */ /* Immediate width */
mask = tcg_const_i32(0x7fffffffu >> (len - 1)); tcg_gen_movi_i32(mask, 0x7fffffffu >> (len - 1));
if (tlen) { if (is_bfffo) {
tcg_gen_movi_i32(tlen, len); tlen = tcg_constant_i32(len);
} }
} }
if (ext & 0x800) { if (ext & 0x800) {
/* Variable offset */ /* Variable offset */
tcg_gen_andi_i32(tmp, DREG(ext, 6), 31); tcg_gen_andi_i32(tmp, DREG(ext, 6), 31);
tcg_gen_rotl_i32(QREG_CC_N, src, tmp); tcg_gen_rotl_i32(QREG_CC_N, src, tmp);
tcg_gen_andc_i32(QREG_CC_N, QREG_CC_N, mask); tcg_gen_andc_i32(QREG_CC_N, QREG_CC_N, mask);
tcg_gen_rotr_i32(mask, mask, tmp); tcg_gen_rotr_i32(mask, mask, tmp);
if (tofs) { if (is_bfffo) {
tcg_gen_mov_i32(tofs, tmp); tofs = tmp;
} }
} else { } else {
/* Immediate offset (and variable width) */ /* Immediate offset (and variable width) */
tcg_gen_rotli_i32(QREG_CC_N, src, ofs); tcg_gen_rotli_i32(QREG_CC_N, src, ofs);
tcg_gen_andc_i32(QREG_CC_N, QREG_CC_N, mask); tcg_gen_andc_i32(QREG_CC_N, QREG_CC_N, mask);
tcg_gen_rotri_i32(mask, mask, ofs); tcg_gen_rotri_i32(mask, mask, ofs);
if (tofs) { if (is_bfffo) {
tcg_gen_movi_i32(tofs, ofs); tofs = tcg_constant_i32(ofs);
} }
} }
} }