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tcg/ppc: Drop addrhi from prepare_host_addr
The guest address will now always fit in one register. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
0d000618d9
commit
7a967f3466
1 changed files with 23 additions and 52 deletions
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@ -2438,8 +2438,7 @@ bool tcg_target_has_memory_bswap(MemOp memop)
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* is required and fill in @h with the host address for the fast path.
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*/
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static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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TCGReg addrlo, TCGReg addrhi,
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MemOpIdx oi, bool is_ld)
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TCGReg addr, MemOpIdx oi, bool is_ld)
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{
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TCGType addr_type = s->addr_type;
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TCGLabelQemuLdst *ldst = NULL;
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@ -2474,8 +2473,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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ldst = new_ldst_label(s);
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ldst->is_ld = is_ld;
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ldst->oi = oi;
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ldst->addrlo_reg = addrlo;
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ldst->addrhi_reg = addrhi;
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ldst->addrlo_reg = addr;
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/* Load tlb_mask[mmu_idx] and tlb_table[mmu_idx]. */
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_AREG0, mask_off);
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@ -2483,10 +2481,10 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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/* Extract the page index, shifted into place for tlb index. */
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if (TCG_TARGET_REG_BITS == 32) {
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tcg_out_shri32(s, TCG_REG_R0, addrlo,
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tcg_out_shri32(s, TCG_REG_R0, addr,
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s->page_bits - CPU_TLB_ENTRY_BITS);
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} else {
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tcg_out_shri64(s, TCG_REG_R0, addrlo,
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tcg_out_shri64(s, TCG_REG_R0, addr,
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s->page_bits - CPU_TLB_ENTRY_BITS);
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}
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tcg_out32(s, AND | SAB(TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_R0));
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@ -2534,10 +2532,10 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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if (a_bits < s_bits) {
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a_bits = s_bits;
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}
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tcg_out_rlw(s, RLWINM, TCG_REG_R0, addrlo, 0,
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tcg_out_rlw(s, RLWINM, TCG_REG_R0, addr, 0,
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(32 - a_bits) & 31, 31 - s->page_bits);
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} else {
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TCGReg t = addrlo;
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TCGReg t = addr;
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/*
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* If the access is unaligned, we need to make sure we fail if we
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@ -2566,30 +2564,8 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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}
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}
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if (TCG_TARGET_REG_BITS == 32 && addr_type != TCG_TYPE_I32) {
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/* Low part comparison into cr7. */
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tcg_out_cmp(s, TCG_COND_EQ, TCG_REG_R0, TCG_REG_TMP2,
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0, 7, TCG_TYPE_I32);
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/* Load the high part TLB comparator into TMP2. */
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tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_TMP2, TCG_REG_TMP1,
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cmp_off + 4 * !HOST_BIG_ENDIAN);
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/* Load addend, deferred for this case. */
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1,
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offsetof(CPUTLBEntry, addend));
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/* High part comparison into cr6. */
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tcg_out_cmp(s, TCG_COND_EQ, addrhi, TCG_REG_TMP2,
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0, 6, TCG_TYPE_I32);
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/* Combine comparisons into cr0. */
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tcg_out32(s, CRAND | BT(0, CR_EQ) | BA(6, CR_EQ) | BB(7, CR_EQ));
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} else {
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/* Full comparison into cr0. */
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tcg_out_cmp(s, TCG_COND_EQ, TCG_REG_R0, TCG_REG_TMP2,
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0, 0, addr_type);
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}
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/* Full comparison into cr0. */
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tcg_out_cmp(s, TCG_COND_EQ, TCG_REG_R0, TCG_REG_TMP2, 0, 0, addr_type);
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/* Load a pointer into the current opcode w/conditional branch-link. */
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ldst->label_ptr[0] = s->code_ptr;
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@ -2601,12 +2577,11 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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ldst = new_ldst_label(s);
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ldst->is_ld = is_ld;
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ldst->oi = oi;
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ldst->addrlo_reg = addrlo;
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ldst->addrhi_reg = addrhi;
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ldst->addrlo_reg = addr;
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/* We are expecting a_bits to max out at 7, much lower than ANDI. */
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tcg_debug_assert(a_bits < 16);
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tcg_out32(s, ANDI | SAI(addrlo, TCG_REG_R0, (1 << a_bits) - 1));
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tcg_out32(s, ANDI | SAI(addr, TCG_REG_R0, (1 << a_bits) - 1));
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ldst->label_ptr[0] = s->code_ptr;
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tcg_out32(s, BC | BI(0, CR_EQ) | BO_COND_FALSE | LK);
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@ -2617,24 +2592,23 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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if (TCG_TARGET_REG_BITS == 64 && addr_type == TCG_TYPE_I32) {
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/* Zero-extend the guest address for use in the host address. */
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tcg_out_ext32u(s, TCG_REG_TMP2, addrlo);
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tcg_out_ext32u(s, TCG_REG_TMP2, addr);
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h->index = TCG_REG_TMP2;
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} else {
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h->index = addrlo;
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h->index = addr;
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}
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return ldst;
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}
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static void tcg_out_qemu_ld(TCGContext *s, TCGReg datalo, TCGReg datahi,
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TCGReg addrlo, TCGReg addrhi,
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MemOpIdx oi, TCGType data_type)
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TCGReg addr, MemOpIdx oi, TCGType data_type)
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{
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MemOp opc = get_memop(oi);
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TCGLabelQemuLdst *ldst;
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HostAddress h;
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ldst = prepare_host_addr(s, &h, addrlo, addrhi, oi, true);
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ldst = prepare_host_addr(s, &h, addr, oi, true);
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if (TCG_TARGET_REG_BITS == 32 && (opc & MO_SIZE) == MO_64) {
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if (opc & MO_BSWAP) {
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@ -2678,14 +2652,13 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg datalo, TCGReg datahi,
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}
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static void tcg_out_qemu_st(TCGContext *s, TCGReg datalo, TCGReg datahi,
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TCGReg addrlo, TCGReg addrhi,
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MemOpIdx oi, TCGType data_type)
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TCGReg addr, MemOpIdx oi, TCGType data_type)
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{
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MemOp opc = get_memop(oi);
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TCGLabelQemuLdst *ldst;
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HostAddress h;
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ldst = prepare_host_addr(s, &h, addrlo, addrhi, oi, false);
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ldst = prepare_host_addr(s, &h, addr, oi, false);
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if (TCG_TARGET_REG_BITS == 32 && (opc & MO_SIZE) == MO_64) {
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if (opc & MO_BSWAP) {
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@ -2729,7 +2702,7 @@ static void tcg_out_qemu_ldst_i128(TCGContext *s, TCGReg datalo, TCGReg datahi,
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uint32_t insn;
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TCGReg index;
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ldst = prepare_host_addr(s, &h, addr_reg, -1, oi, is_ld);
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ldst = prepare_host_addr(s, &h, addr_reg, oi, is_ld);
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/* Compose the final address, as LQ/STQ have no indexing. */
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index = h.index;
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@ -3309,14 +3282,13 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
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break;
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case INDEX_op_qemu_ld_i32:
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tcg_out_qemu_ld(s, args[0], -1, args[1], -1, args[2], TCG_TYPE_I32);
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tcg_out_qemu_ld(s, args[0], -1, args[1], args[2], TCG_TYPE_I32);
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break;
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case INDEX_op_qemu_ld_i64:
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_out_qemu_ld(s, args[0], -1, args[1], -1,
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args[2], TCG_TYPE_I64);
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tcg_out_qemu_ld(s, args[0], -1, args[1], args[2], TCG_TYPE_I64);
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} else {
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tcg_out_qemu_ld(s, args[0], args[1], args[2], -1,
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tcg_out_qemu_ld(s, args[0], args[1], args[2],
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args[3], TCG_TYPE_I64);
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}
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break;
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@ -3326,14 +3298,13 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
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break;
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case INDEX_op_qemu_st_i32:
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tcg_out_qemu_st(s, args[0], -1, args[1], -1, args[2], TCG_TYPE_I32);
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tcg_out_qemu_st(s, args[0], -1, args[1], args[2], TCG_TYPE_I32);
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break;
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case INDEX_op_qemu_st_i64:
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_out_qemu_st(s, args[0], -1, args[1], -1,
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args[2], TCG_TYPE_I64);
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tcg_out_qemu_st(s, args[0], -1, args[1], args[2], TCG_TYPE_I64);
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} else {
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tcg_out_qemu_st(s, args[0], args[1], args[2], -1,
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tcg_out_qemu_st(s, args[0], args[1], args[2],
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args[3], TCG_TYPE_I64);
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}
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break;
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