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Add MIPS32R2 instructions, and generally straighten out the instruction

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decoding. This is also the first percent towards MIPS64 support.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2006-12-06 20:17:30 +00:00
parent 8c0fdd856c
commit 7a387fffce
7 changed files with 2233 additions and 589 deletions
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target-mips/exec.h
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@ -68,6 +68,7 @@ void do_msubu (void);
#endif
void do_mfc0_random(void);
void do_mfc0_count(void);
void do_mtc0_entryhi(uint32_t in);
void do_mtc0_status_debug(uint32_t old, uint32_t val);
void do_mtc0_status_irqraise_debug(void);
void do_tlbwi (void);