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target-i386: Intel MPX

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Add some MPX related definiation, and hardcode sizes and offsets
of xsave features 3 and 4. It also add corresponding part to
kvm_get/put_xsave, and vmstate.

Signed-off-by: Liu Jinsong <jinsong.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Liu Jinsong 2013-12-05 08:32:12 +08:00 • committed by Paolo Bonzini
parent 6747f6456f
commit 79e9ebebbf
4 changed files with 101 additions and 3 deletions
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25
target-i386/cpu.h
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@ -380,9 +380,14 @@
#define MSR_VM_HSAVE_PA 0xc0010117
#define XSTATE_FP 1
#define XSTATE_SSE 2
#define XSTATE_YMM 4
#define MSR_IA32_BNDCFGS 0x00000d90
#define XSTATE_FP (1ULL << 0)
#define XSTATE_SSE (1ULL << 1)
#define XSTATE_YMM (1ULL << 2)
#define XSTATE_BNDREGS (1ULL << 3)
#define XSTATE_BNDCSR (1ULL << 4)
/* CPUID feature words */
typedef enum FeatureWord {
@ -545,6 +550,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_7_0_EBX_ERMS (1 << 9)
#define CPUID_7_0_EBX_INVPCID (1 << 10)
#define CPUID_7_0_EBX_RTM (1 << 11)
#define CPUID_7_0_EBX_MPX (1 << 14)
#define CPUID_7_0_EBX_RDSEED (1 << 18)
#define CPUID_7_0_EBX_ADX (1 << 19)
#define CPUID_7_0_EBX_SMAP (1 << 20)
@ -695,6 +701,16 @@ typedef union {
uint64_t q;
} MMXReg;
typedef struct BNDReg {
uint64_t lb;
uint64_t ub;
} BNDReg;
typedef struct BNDCSReg {
uint64_t cfgu;
uint64_t sts;
} BNDCSReg;
#ifdef HOST_WORDS_BIGENDIAN
#define XMM_B(n) _b[15 - (n)]
#define XMM_W(n) _w[7 - (n)]
@ -912,6 +928,9 @@ typedef struct CPUX86State {
uint64_t xstate_bv;
XMMReg ymmh_regs[CPU_NB_REGS];
BNDReg bnd_regs[4];
BNDCSReg bndcs_regs;
uint64_t msr_bndcfgs;
uint64_t xcr0;