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target/microblaze: Split out ESR from env->sregs
Continue eliminating the sregs array in favor of individual members. Does not correct the width of ESR, yet. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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6 changed files with 27 additions and 25 deletions
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@ -78,14 +78,14 @@ void cpu_loop(CPUMBState *env)
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case EXCP_HW_EXCP:
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env->regs[17] = env->pc + 4;
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if (env->iflags & D_FLAG) {
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env->sregs[SR_ESR] |= 1 << 12;
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env->esr |= 1 << 12;
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env->pc -= 4;
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/* FIXME: if branch was immed, replay the imm as well. */
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}
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env->iflags &= ~(IMM_FLAG | D_FLAG);
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switch (env->sregs[SR_ESR] & 31) {
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switch (env->esr & 31) {
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case ESR_EC_DIVZERO:
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info.si_signo = TARGET_SIGFPE;
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info.si_errno = 0;
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@ -107,7 +107,7 @@ void cpu_loop(CPUMBState *env)
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break;
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default:
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fprintf(stderr, "Unhandled hw-exception: 0x%" PRIx64 "\n",
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env->sregs[SR_ESR] & ESR_EC_MASK);
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env->esr & ESR_EC_MASK);
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cpu_dump_state(cs, stderr, 0);
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exit(EXIT_FAILURE);
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break;
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