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accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc
Instead of having a compile-time TARGET_HAS_PRECISE_SMC definition, have each target set the 'precise_smc' field in the TCGCPUOps structure. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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8 changed files with 27 additions and 31 deletions
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@ -28,6 +28,7 @@
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#include "exec/mmap-lock.h"
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#include "exec/tb-flush.h"
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#include "exec/target_page.h"
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#include "accel/tcg/cpu-ops.h"
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#include "tb-internal.h"
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#include "system/tcg.h"
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#include "tcg/tcg.h"
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@ -1042,9 +1043,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr)
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/*
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* Called with mmap_lock held. If pc is not 0 then it indicates the
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* host PC of the faulting store instruction that caused this invalidate.
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* Returns true if the caller needs to abort execution of the current
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* TB (because it was modified by this store and the guest CPU has
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* precise-SMC semantics).
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* Returns true if the caller needs to abort execution of the current TB.
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*/
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bool tb_invalidate_phys_page_unwind(CPUState *cpu, tb_page_addr_t addr,
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uintptr_t pc)
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@ -1059,10 +1058,7 @@ bool tb_invalidate_phys_page_unwind(CPUState *cpu, tb_page_addr_t addr,
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* Without precise smc semantics, or when outside of a TB,
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* we can skip to invalidate.
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*/
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#ifndef TARGET_HAS_PRECISE_SMC
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pc = 0;
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#endif
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if (!pc) {
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if (!pc || !cpu || !cpu->cc->tcg_ops->precise_smc) {
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tb_invalidate_phys_page(addr);
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return false;
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}
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@ -1113,14 +1109,16 @@ tb_invalidate_phys_page_range__locked(CPUState *cpu,
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{
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TranslationBlock *tb;
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PageForEachNext n;
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#ifdef TARGET_HAS_PRECISE_SMC
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bool current_tb_modified = false;
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TranslationBlock *current_tb = retaddr ? tcg_tb_lookup(retaddr) : NULL;
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#endif /* TARGET_HAS_PRECISE_SMC */
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TranslationBlock *current_tb = NULL;
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/* Range may not cross a page. */
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tcg_debug_assert(((start ^ last) & TARGET_PAGE_MASK) == 0);
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if (retaddr && cpu && cpu->cc->tcg_ops->precise_smc) {
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current_tb = tcg_tb_lookup(retaddr);
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}
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/*
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* We remove all the TBs in the range [start, last].
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* XXX: see if in some cases it could be faster to invalidate all the code
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@ -1138,8 +1136,7 @@ tb_invalidate_phys_page_range__locked(CPUState *cpu,
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tb_last = tb_start + (tb_last & ~TARGET_PAGE_MASK);
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}
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if (!(tb_last < start || tb_start > last)) {
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#ifdef TARGET_HAS_PRECISE_SMC
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if (current_tb == tb &&
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if (unlikely(current_tb == tb) &&
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(tb_cflags(current_tb) & CF_COUNT_MASK) != 1) {
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/*
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* If we are modifying the current TB, we must stop
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@ -1149,9 +1146,8 @@ tb_invalidate_phys_page_range__locked(CPUState *cpu,
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* restore the CPU state.
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*/
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current_tb_modified = true;
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cpu_restore_state_from_tb(current_cpu, current_tb, retaddr);
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cpu_restore_state_from_tb(cpu, current_tb, retaddr);
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}
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#endif /* TARGET_HAS_PRECISE_SMC */
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tb_phys_invalidate__locked(tb);
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}
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}
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@ -1161,15 +1157,13 @@ tb_invalidate_phys_page_range__locked(CPUState *cpu,
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tlb_unprotect_code(start);
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}
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#ifdef TARGET_HAS_PRECISE_SMC
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if (current_tb_modified) {
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if (unlikely(current_tb_modified)) {
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page_collection_unlock(pages);
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/* Force execution of one insn next time. */
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current_cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(current_cpu);
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cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
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mmap_unlock();
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cpu_loop_exit_noexc(current_cpu);
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cpu_loop_exit_noexc(cpu);
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}
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#endif
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}
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/*
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@ -733,12 +733,12 @@ int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc)
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* this thread raced with another one which got here first and
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* set the page to PAGE_WRITE and did the TB invalidate for us.
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*/
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#ifdef TARGET_HAS_PRECISE_SMC
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TranslationBlock *current_tb = tcg_tb_lookup(pc);
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if (current_tb) {
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current_tb_invalidated = tb_cflags(current_tb) & CF_INVALID;
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if (pc && cpu->cc->tcg_ops->precise_smc) {
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TranslationBlock *current_tb = tcg_tb_lookup(pc);
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if (current_tb) {
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current_tb_invalidated = tb_cflags(current_tb) & CF_INVALID;
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}
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}
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#endif
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} else {
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int host_page_size = qemu_real_host_page_size();
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target_ulong start, len, i;
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