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ppc/pnv: introduce Pnv8Chip and Pnv9Chip models
It introduces a base PnvChip class from which the specific processor chip classes, Pnv8Chip and Pnv9Chip, inherit. Each of them needs to define an init and a realize routine which will create the controllers of the target processor. For the moment, the base PnvChip class handles the XSCOM bus and the cores. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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2 changed files with 202 additions and 103 deletions
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@ -57,12 +57,32 @@ typedef struct PnvChip {
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MemoryRegion xscom_mmio;
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MemoryRegion xscom;
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AddressSpace xscom_as;
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} PnvChip;
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#define TYPE_PNV8_CHIP "pnv8-chip"
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#define PNV8_CHIP(obj) OBJECT_CHECK(Pnv8Chip, (obj), TYPE_PNV8_CHIP)
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typedef struct Pnv8Chip {
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/*< private >*/
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PnvChip parent_obj;
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/*< public >*/
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MemoryRegion icp_mmio;
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PnvLpcController lpc;
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PnvPsi psi;
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PnvOCC occ;
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} PnvChip;
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} Pnv8Chip;
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#define TYPE_PNV9_CHIP "pnv9-chip"
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#define PNV9_CHIP(obj) OBJECT_CHECK(Pnv9Chip, (obj), TYPE_PNV9_CHIP)
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typedef struct Pnv9Chip {
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/*< private >*/
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PnvChip parent_obj;
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/*< public >*/
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} Pnv9Chip;
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typedef struct PnvChipClass {
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/*< private >*/
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@ -75,6 +95,8 @@ typedef struct PnvChipClass {
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hwaddr xscom_base;
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DeviceRealize parent_realize;
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uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);
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Object *(*intc_create)(PnvChip *chip, Object *child, Error **errp);
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ISABus *(*isa_create)(PnvChip *chip, Error **errp);
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