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hw/arm/exynos4210: Coalesce board_irqs and irq_table
The exynos4210 code currently has two very similar arrays of IRQs: * board_irqs is a field of the Exynos4210Irq struct which is filled in by exynos4210_init_board_irqs() with the appropriate qemu_irqs for each IRQ the board/SoC can assert * irq_table is a set of qemu_irqs pointed to from the Exynos4210State struct. It's allocated in exynos4210_init_irq, and the only behaviour these irqs have is that they pass on the level to the equivalent board_irqs[] irq The extra indirection through irq_table is unnecessary, so coalesce these into a single irq_table[] array as a direct field in Exynos4210State which exynos4210_init_board_irqs() fills in. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220404154658.565020-6-peter.maydell@linaro.org
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3 changed files with 11 additions and 35 deletions
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@ -228,10 +228,6 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
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qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
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}
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/*** IRQs ***/
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s->irq_table = exynos4210_init_irq(&s->irqs);
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/* IRQ Gate */
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for (i = 0; i < EXYNOS4210_NCPUS; i++) {
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DeviceState *orgate = DEVICE(&s->cpu_irq_orgate[i]);
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@ -296,7 +292,7 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
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sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_COMBINER_BASE_ADDR);
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/* Initialize board IRQs. */
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exynos4210_init_board_irqs(&s->irqs);
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exynos4210_init_board_irqs(s);
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/*** Memory ***/
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