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target/arm: Implement MVE LCTP

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Implement the MVE LCTP instruction.

We put its decode and implementation with the other
low-overhead-branch insns because although it is only present if MVE
is implemented it is logically in the same group as the other LOB
insns.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210614151007.4545-7-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2021-06-14 16:09:16 +01:00
parent 9a486856e9
commit 76c32d721d
2 changed files with 26 additions and 0 deletions
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2
target/arm/t32.decode
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@ -674,5 +674,7 @@ BL 1111 0. .......... 11.1 ............ @branch24
DLS 1111 0 0000 100 rn:4 1110 0000 0000 0001
WLS 1111 0 0000 100 rn:4 1100 . .......... 1 imm=%lob_imm
LE 1111 0 0000 0 f:1 0 1111 1100 . .......... 1 imm=%lob_imm
LCTP 1111 0 0000 000 1111 1110 0000 0000 0001
]
}