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Hexagon (tests/tcg/hexagon) Move HVX test infra to header file
This will facilitate adding additional tests in separate .c files Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230406174241.853296-1-tsimpson@quicinc.com>
This commit is contained in:
Taylor Simpson
parent
148ef7fd8d
commit
761e1c675e
3 changed files with 181 additions and 158 deletions
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@ -84,6 +84,7 @@ usr: usr.c
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scatter_gather: CFLAGS += -mhvx
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scatter_gather: CFLAGS += -mhvx
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vector_add_int: CFLAGS += -mhvx -fvectorize
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vector_add_int: CFLAGS += -mhvx -fvectorize
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hvx_misc: hvx_misc.c hvx_misc.h
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hvx_misc: CFLAGS += -mhvx
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hvx_misc: CFLAGS += -mhvx
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hvx_histogram: CFLAGS += -mhvx -Wno-gnu-folding-constant
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hvx_histogram: CFLAGS += -mhvx -Wno-gnu-folding-constant
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright(c) 2021-2022 Qualcomm Innovation Center, Inc. All Rights Reserved.
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* Copyright(c) 2021-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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@ -23,69 +23,7 @@
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int err;
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int err;
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static void __check(int line, int i, int j, uint64_t result, uint64_t expect)
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#include "hvx_misc.h"
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{
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if (result != expect) {
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printf("ERROR at line %d: [%d][%d] 0x%016llx != 0x%016llx\n",
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line, i, j, result, expect);
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err++;
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}
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}
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#define check(RES, EXP) __check(__LINE__, RES, EXP)
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#define MAX_VEC_SIZE_BYTES 128
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typedef union {
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uint64_t ud[MAX_VEC_SIZE_BYTES / 8];
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int64_t d[MAX_VEC_SIZE_BYTES / 8];
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uint32_t uw[MAX_VEC_SIZE_BYTES / 4];
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int32_t w[MAX_VEC_SIZE_BYTES / 4];
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uint16_t uh[MAX_VEC_SIZE_BYTES / 2];
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int16_t h[MAX_VEC_SIZE_BYTES / 2];
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uint8_t ub[MAX_VEC_SIZE_BYTES / 1];
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int8_t b[MAX_VEC_SIZE_BYTES / 1];
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} MMVector;
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#define BUFSIZE 16
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#define OUTSIZE 16
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#define MASKMOD 3
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MMVector buffer0[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
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MMVector buffer1[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
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MMVector mask[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
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MMVector output[OUTSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
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MMVector expect[OUTSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
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#define CHECK_OUTPUT_FUNC(FIELD, FIELDSZ) \
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static void check_output_##FIELD(int line, size_t num_vectors) \
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{ \
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for (int i = 0; i < num_vectors; i++) { \
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for (int j = 0; j < MAX_VEC_SIZE_BYTES / FIELDSZ; j++) { \
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__check(line, i, j, output[i].FIELD[j], expect[i].FIELD[j]); \
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} \
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} \
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}
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CHECK_OUTPUT_FUNC(d, 8)
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CHECK_OUTPUT_FUNC(w, 4)
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CHECK_OUTPUT_FUNC(h, 2)
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CHECK_OUTPUT_FUNC(b, 1)
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static void init_buffers(void)
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{
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int counter0 = 0;
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int counter1 = 17;
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for (int i = 0; i < BUFSIZE; i++) {
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for (int j = 0; j < MAX_VEC_SIZE_BYTES; j++) {
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buffer0[i].b[j] = counter0++;
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buffer1[i].b[j] = counter1++;
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}
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for (int j = 0; j < MAX_VEC_SIZE_BYTES / 4; j++) {
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mask[i].w[j] = (i + j % MASKMOD == 0) ? 0 : 1;
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}
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}
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}
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static void test_load_tmp(void)
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static void test_load_tmp(void)
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{
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{
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@ -322,100 +260,6 @@ static void test_max_temps()
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check_output_b(__LINE__, 5);
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check_output_b(__LINE__, 5);
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}
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}
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#define VEC_OP1(ASM, EL, IN, OUT) \
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asm("v2 = vmem(%0 + #0)\n\t" \
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"v2" #EL " = " #ASM "(v2" #EL ")\n\t" \
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"vmem(%1 + #0) = v2\n\t" \
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: : "r"(IN), "r"(OUT) : "v2", "memory")
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#define VEC_OP2(ASM, EL, IN0, IN1, OUT) \
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asm("v2 = vmem(%0 + #0)\n\t" \
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"v3 = vmem(%1 + #0)\n\t" \
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"v2" #EL " = " #ASM "(v2" #EL ", v3" #EL ")\n\t" \
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"vmem(%2 + #0) = v2\n\t" \
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: : "r"(IN0), "r"(IN1), "r"(OUT) : "v2", "v3", "memory")
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#define TEST_VEC_OP1(NAME, ASM, EL, FIELD, FIELDSZ, OP) \
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static void test_##NAME(void) \
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{ \
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void *pin = buffer0; \
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void *pout = output; \
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for (int i = 0; i < BUFSIZE; i++) { \
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VEC_OP1(ASM, EL, pin, pout); \
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pin += sizeof(MMVector); \
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pout += sizeof(MMVector); \
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} \
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for (int i = 0; i < BUFSIZE; i++) { \
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for (int j = 0; j < MAX_VEC_SIZE_BYTES / FIELDSZ; j++) { \
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expect[i].FIELD[j] = OP buffer0[i].FIELD[j]; \
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} \
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} \
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check_output_##FIELD(__LINE__, BUFSIZE); \
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}
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#define TEST_VEC_OP2(NAME, ASM, EL, FIELD, FIELDSZ, OP) \
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static void test_##NAME(void) \
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{ \
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void *p0 = buffer0; \
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void *p1 = buffer1; \
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void *pout = output; \
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for (int i = 0; i < BUFSIZE; i++) { \
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VEC_OP2(ASM, EL, p0, p1, pout); \
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p0 += sizeof(MMVector); \
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p1 += sizeof(MMVector); \
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pout += sizeof(MMVector); \
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} \
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for (int i = 0; i < BUFSIZE; i++) { \
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for (int j = 0; j < MAX_VEC_SIZE_BYTES / FIELDSZ; j++) { \
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expect[i].FIELD[j] = buffer0[i].FIELD[j] OP buffer1[i].FIELD[j]; \
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} \
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} \
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check_output_##FIELD(__LINE__, BUFSIZE); \
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}
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#define THRESHOLD 31
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#define PRED_OP2(ASM, IN0, IN1, OUT, INV) \
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asm("r4 = #%3\n\t" \
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"v1.b = vsplat(r4)\n\t" \
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"v2 = vmem(%0 + #0)\n\t" \
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"q0 = vcmp.gt(v2.b, v1.b)\n\t" \
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"v3 = vmem(%1 + #0)\n\t" \
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"q1 = vcmp.gt(v3.b, v1.b)\n\t" \
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"q2 = " #ASM "(q0, " INV "q1)\n\t" \
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"r4 = #0xff\n\t" \
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"v1.b = vsplat(r4)\n\t" \
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"if (q2) vmem(%2 + #0) = v1\n\t" \
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: : "r"(IN0), "r"(IN1), "r"(OUT), "i"(THRESHOLD) \
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: "r4", "v1", "v2", "v3", "q0", "q1", "q2", "memory")
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#define TEST_PRED_OP2(NAME, ASM, OP, INV) \
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static void test_##NAME(bool invert) \
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{ \
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void *p0 = buffer0; \
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void *p1 = buffer1; \
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void *pout = output; \
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memset(output, 0, sizeof(expect)); \
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for (int i = 0; i < BUFSIZE; i++) { \
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PRED_OP2(ASM, p0, p1, pout, INV); \
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p0 += sizeof(MMVector); \
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p1 += sizeof(MMVector); \
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pout += sizeof(MMVector); \
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} \
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for (int i = 0; i < BUFSIZE; i++) { \
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for (int j = 0; j < MAX_VEC_SIZE_BYTES; j++) { \
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bool p0 = (buffer0[i].b[j] > THRESHOLD); \
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bool p1 = (buffer1[i].b[j] > THRESHOLD); \
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if (invert) { \
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expect[i].b[j] = (p0 OP !p1) ? 0xff : 0x00; \
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} else { \
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expect[i].b[j] = (p0 OP p1) ? 0xff : 0x00; \
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} \
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} \
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} \
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check_output_b(__LINE__, BUFSIZE); \
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}
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TEST_VEC_OP2(vadd_w, vadd, .w, w, 4, +)
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TEST_VEC_OP2(vadd_w, vadd, .w, w, 4, +)
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TEST_VEC_OP2(vadd_h, vadd, .h, h, 2, +)
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TEST_VEC_OP2(vadd_h, vadd, .h, h, 2, +)
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TEST_VEC_OP2(vadd_b, vadd, .b, b, 1, +)
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TEST_VEC_OP2(vadd_b, vadd, .b, b, 1, +)
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178
tests/tcg/hexagon/hvx_misc.h
Normal file
178
tests/tcg/hexagon/hvx_misc.h
Normal file
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@ -0,0 +1,178 @@
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/*
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* Copyright(c) 2021-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HVX_MISC_H
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#define HVX_MISC_H
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static inline void check(int line, int i, int j,
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uint64_t result, uint64_t expect)
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{
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if (result != expect) {
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printf("ERROR at line %d: [%d][%d] 0x%016llx != 0x%016llx\n",
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line, i, j, result, expect);
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err++;
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}
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}
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#define MAX_VEC_SIZE_BYTES 128
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typedef union {
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uint64_t ud[MAX_VEC_SIZE_BYTES / 8];
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int64_t d[MAX_VEC_SIZE_BYTES / 8];
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uint32_t uw[MAX_VEC_SIZE_BYTES / 4];
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int32_t w[MAX_VEC_SIZE_BYTES / 4];
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uint16_t uh[MAX_VEC_SIZE_BYTES / 2];
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int16_t h[MAX_VEC_SIZE_BYTES / 2];
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uint8_t ub[MAX_VEC_SIZE_BYTES / 1];
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int8_t b[MAX_VEC_SIZE_BYTES / 1];
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} MMVector;
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#define BUFSIZE 16
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#define OUTSIZE 16
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#define MASKMOD 3
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MMVector buffer0[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
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MMVector buffer1[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
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MMVector mask[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
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MMVector output[OUTSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
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MMVector expect[OUTSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
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#define CHECK_OUTPUT_FUNC(FIELD, FIELDSZ) \
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static inline void check_output_##FIELD(int line, size_t num_vectors) \
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{ \
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for (int i = 0; i < num_vectors; i++) { \
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for (int j = 0; j < MAX_VEC_SIZE_BYTES / FIELDSZ; j++) { \
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check(line, i, j, output[i].FIELD[j], expect[i].FIELD[j]); \
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} \
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} \
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}
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CHECK_OUTPUT_FUNC(d, 8)
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CHECK_OUTPUT_FUNC(w, 4)
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CHECK_OUTPUT_FUNC(h, 2)
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CHECK_OUTPUT_FUNC(b, 1)
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static inline void init_buffers(void)
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{
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int counter0 = 0;
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int counter1 = 17;
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for (int i = 0; i < BUFSIZE; i++) {
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for (int j = 0; j < MAX_VEC_SIZE_BYTES; j++) {
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buffer0[i].b[j] = counter0++;
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buffer1[i].b[j] = counter1++;
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}
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for (int j = 0; j < MAX_VEC_SIZE_BYTES / 4; j++) {
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mask[i].w[j] = (i + j % MASKMOD == 0) ? 0 : 1;
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}
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}
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}
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#define VEC_OP1(ASM, EL, IN, OUT) \
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asm("v2 = vmem(%0 + #0)\n\t" \
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"v2" #EL " = " #ASM "(v2" #EL ")\n\t" \
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"vmem(%1 + #0) = v2\n\t" \
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: : "r"(IN), "r"(OUT) : "v2", "memory")
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#define VEC_OP2(ASM, EL, IN0, IN1, OUT) \
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asm("v2 = vmem(%0 + #0)\n\t" \
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"v3 = vmem(%1 + #0)\n\t" \
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"v2" #EL " = " #ASM "(v2" #EL ", v3" #EL ")\n\t" \
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"vmem(%2 + #0) = v2\n\t" \
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: : "r"(IN0), "r"(IN1), "r"(OUT) : "v2", "v3", "memory")
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#define TEST_VEC_OP1(NAME, ASM, EL, FIELD, FIELDSZ, OP) \
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static inline void test_##NAME(void) \
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{ \
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void *pin = buffer0; \
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void *pout = output; \
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for (int i = 0; i < BUFSIZE; i++) { \
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VEC_OP1(ASM, EL, pin, pout); \
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pin += sizeof(MMVector); \
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pout += sizeof(MMVector); \
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} \
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for (int i = 0; i < BUFSIZE; i++) { \
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for (int j = 0; j < MAX_VEC_SIZE_BYTES / FIELDSZ; j++) { \
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expect[i].FIELD[j] = OP buffer0[i].FIELD[j]; \
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} \
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} \
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check_output_##FIELD(__LINE__, BUFSIZE); \
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}
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#define TEST_VEC_OP2(NAME, ASM, EL, FIELD, FIELDSZ, OP) \
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static inline void test_##NAME(void) \
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{ \
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void *p0 = buffer0; \
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void *p1 = buffer1; \
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void *pout = output; \
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for (int i = 0; i < BUFSIZE; i++) { \
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VEC_OP2(ASM, EL, p0, p1, pout); \
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p0 += sizeof(MMVector); \
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p1 += sizeof(MMVector); \
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pout += sizeof(MMVector); \
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} \
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for (int i = 0; i < BUFSIZE; i++) { \
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for (int j = 0; j < MAX_VEC_SIZE_BYTES / FIELDSZ; j++) { \
|
||||||
|
expect[i].FIELD[j] = buffer0[i].FIELD[j] OP buffer1[i].FIELD[j]; \
|
||||||
|
} \
|
||||||
|
} \
|
||||||
|
check_output_##FIELD(__LINE__, BUFSIZE); \
|
||||||
|
}
|
||||||
|
|
||||||
|
#define THRESHOLD 31
|
||||||
|
|
||||||
|
#define PRED_OP2(ASM, IN0, IN1, OUT, INV) \
|
||||||
|
asm("r4 = #%3\n\t" \
|
||||||
|
"v1.b = vsplat(r4)\n\t" \
|
||||||
|
"v2 = vmem(%0 + #0)\n\t" \
|
||||||
|
"q0 = vcmp.gt(v2.b, v1.b)\n\t" \
|
||||||
|
"v3 = vmem(%1 + #0)\n\t" \
|
||||||
|
"q1 = vcmp.gt(v3.b, v1.b)\n\t" \
|
||||||
|
"q2 = " #ASM "(q0, " INV "q1)\n\t" \
|
||||||
|
"r4 = #0xff\n\t" \
|
||||||
|
"v1.b = vsplat(r4)\n\t" \
|
||||||
|
"if (q2) vmem(%2 + #0) = v1\n\t" \
|
||||||
|
: : "r"(IN0), "r"(IN1), "r"(OUT), "i"(THRESHOLD) \
|
||||||
|
: "r4", "v1", "v2", "v3", "q0", "q1", "q2", "memory")
|
||||||
|
|
||||||
|
#define TEST_PRED_OP2(NAME, ASM, OP, INV) \
|
||||||
|
static inline void test_##NAME(bool invert) \
|
||||||
|
{ \
|
||||||
|
void *p0 = buffer0; \
|
||||||
|
void *p1 = buffer1; \
|
||||||
|
void *pout = output; \
|
||||||
|
memset(output, 0, sizeof(expect)); \
|
||||||
|
for (int i = 0; i < BUFSIZE; i++) { \
|
||||||
|
PRED_OP2(ASM, p0, p1, pout, INV); \
|
||||||
|
p0 += sizeof(MMVector); \
|
||||||
|
p1 += sizeof(MMVector); \
|
||||||
|
pout += sizeof(MMVector); \
|
||||||
|
} \
|
||||||
|
for (int i = 0; i < BUFSIZE; i++) { \
|
||||||
|
for (int j = 0; j < MAX_VEC_SIZE_BYTES; j++) { \
|
||||||
|
bool p0 = (buffer0[i].b[j] > THRESHOLD); \
|
||||||
|
bool p1 = (buffer1[i].b[j] > THRESHOLD); \
|
||||||
|
if (invert) { \
|
||||||
|
expect[i].b[j] = (p0 OP !p1) ? 0xff : 0x00; \
|
||||||
|
} else { \
|
||||||
|
expect[i].b[j] = (p0 OP p1) ? 0xff : 0x00; \
|
||||||
|
} \
|
||||||
|
} \
|
||||||
|
} \
|
||||||
|
check_output_b(__LINE__, BUFSIZE); \
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
Loading…
Add table
Add a link
Reference in a new issue