target/xtensa: implement DIWBUI.P opcode

This is a recent addition to the set of data cache opcodes.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2019-04-14 14:02:17 -07:00
parent 4d04ea35b3
commit 75eed0e5f7
3 changed files with 12 additions and 0 deletions

View file

@ -466,6 +466,7 @@ struct XtensaConfig {
unsigned icache_ways;
unsigned dcache_ways;
unsigned dcache_line_bytes;
uint32_t memctl_mask;
XtensaMemory instrom;