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hw/loongarch: Change macro name 'LS7A_XXX' to 'VIRT_XXX'
Change macro name 'LS7A_XXX' to 'VIRT_XXX', as the loongarch virt machinue use the GPEX bridge instead of LS7A bridge. So the macro name should keep consistency. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220729073018.27037-3-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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4 changed files with 61 additions and 64 deletions
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@ -15,34 +15,31 @@
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#include "qemu/range.h"
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#include "qom/object.h"
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#define LS7A_PCI_MEM_BASE 0x40000000UL
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#define LS7A_PCI_MEM_SIZE 0x40000000UL
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#define LS7A_PCI_IO_OFFSET 0x4000
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#define LS_PCIECFG_BASE 0x20000000
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#define LS_PCIECFG_SIZE 0x08000000
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#define LS7A_PCI_IO_BASE 0x18004000UL
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#define LS7A_PCI_IO_SIZE 0xC000
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#define VIRT_PCI_MEM_BASE 0x40000000UL
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#define VIRT_PCI_MEM_SIZE 0x40000000UL
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#define VIRT_PCI_IO_OFFSET 0x4000
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#define VIRT_PCI_CFG_BASE 0x20000000
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#define VIRT_PCI_CFG_SIZE 0x08000000
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#define VIRT_PCI_IO_BASE 0x18004000UL
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#define VIRT_PCI_IO_SIZE 0xC000
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#define LS7A_PCI_MEM_BASE 0x40000000UL
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#define LS7A_PCI_MEM_SIZE 0x40000000UL
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#define LS7A_PCH_REG_BASE 0x10000000UL
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#define LS7A_IOAPIC_REG_BASE (LS7A_PCH_REG_BASE)
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#define LS7A_PCH_MSI_ADDR_LOW 0x2FF00000UL
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#define VIRT_PCH_REG_BASE 0x10000000UL
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#define VIRT_IOAPIC_REG_BASE (VIRT_PCH_REG_BASE)
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#define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
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/*
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* According to the kernel pch irq start from 64 offset
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* 0 ~ 16 irqs used for non-pci device while 16 ~ 64 irqs
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* used for pci device.
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*/
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#define PCH_PIC_IRQ_OFFSET 64
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#define LS7A_DEVICE_IRQS 16
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#define LS7A_PCI_IRQS 48
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#define LS7A_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2)
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#define LS7A_UART_BASE 0x1fe001e0
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#define LS7A_RTC_IRQ (PCH_PIC_IRQ_OFFSET + 3)
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#define LS7A_MISC_REG_BASE (LS7A_PCH_REG_BASE + 0x00080000)
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#define LS7A_RTC_REG_BASE (LS7A_MISC_REG_BASE + 0x00050100)
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#define LS7A_RTC_LEN 0x100
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#define LS7A_SCI_IRQ (PCH_PIC_IRQ_OFFSET + 4)
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#define PCH_PIC_IRQ_OFFSET 64
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#define VIRT_DEVICE_IRQS 16
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#define VIRT_PCI_IRQS 48
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#define VIRT_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2)
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#define VIRT_UART_BASE 0x1fe001e0
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#define VIRT_RTC_IRQ (PCH_PIC_IRQ_OFFSET + 3)
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#define VIRT_MISC_REG_BASE (VIRT_PCH_REG_BASE + 0x00080000)
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#define VIRT_RTC_REG_BASE (VIRT_MISC_REG_BASE + 0x00050100)
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#define VIRT_RTC_LEN 0x100
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#define VIRT_SCI_IRQ (PCH_PIC_IRQ_OFFSET + 4)
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#endif
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