motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-06 09:13:55 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

versatile_pci: Implement the PCI controller's control registers

Browse source 
The versatile_pci PCI controller has a set of control registers which
handle the mapping between PCI and system address spaces. Implement
these registers (though for now they have no effect since we don't
implement mapping PCI space into system memory at all).

The most natural order for our sysbus regions has the control
registers at the start, so move all the others down one.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Paul Brook <paul@codesourcery.com>
This commit is contained in:
Peter Maydell 2013-04-19 11:15:20 +01:00
parent 66a96d7018
commit 7468d73ac9
3 changed files with 130 additions and 11 deletions
Download patch file Download diff file Expand all files Collapse all files

7
hw/arm/realview.c
View file

@ -217,9 +217,10 @@ static void realview_init(QEMUMachineInitArgs *args,
dev = qdev_create(NULL, "realview_pci");
busdev = SYS_BUS_DEVICE(dev);
qdev_init_nofail(dev);
sysbus_mmio_map(busdev, 0, 0x61000000); /* PCI self-config */
sysbus_mmio_map(busdev, 1, 0x62000000); /* PCI config */
sysbus_mmio_map(busdev, 2, 0x63000000); /* PCI I/O */
sysbus_mmio_map(busdev, 0, 0x10019000); /* PCI controller registers */
sysbus_mmio_map(busdev, 1, 0x61000000); /* PCI self-config */
sysbus_mmio_map(busdev, 2, 0x62000000); /* PCI config */
sysbus_mmio_map(busdev, 3, 0x63000000); /* PCI I/O */
sysbus_connect_irq(busdev, 0, pic[48]);
sysbus_connect_irq(busdev, 1, pic[49]);
sysbus_connect_irq(busdev, 2, pic[50]);