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tcg: Split out target/arch/cpu-param.h

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For all targets, into this new file move TARGET_LONG_BITS,
TARGET_PAGE_BITS, TARGET_PHYS_ADDR_SPACE_BITS,
TARGET_VIRT_ADDR_SPACE_BITS, and NB_MMU_MODES.

Include this new file from exec/cpu-defs.h.

This now removes the somewhat odd requirement that target/arch/cpu.h
defines TARGET_LONG_BITS before including exec/cpu-defs.h, so push the
bulk of the includes within target/arch/cpu.h to the top.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2019-03-22 11:51:19 -07:00
parent 79e4208506
commit 74433bf083
45 changed files with 544 additions and 333 deletions
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17
target/openrisc/cpu-param.h Normal file
View file

@ -0,0 +1,17 @@
/*
* OpenRISC cpu parameters for qemu.
*
* Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
* SPDX-License-Identifier: LGPL-2.0+
*/
#ifndef OPENRISC_CPU_PARAM_H
#define OPENRISC_CPU_PARAM_H 1
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 13
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#define NB_MMU_MODES 3
#endif

14
target/openrisc/cpu.h
View file

@ -20,17 +20,15 @@
#ifndef OPENRISC_CPU_H
#define OPENRISC_CPU_H
#define TARGET_LONG_BITS 32
#include "qemu-common.h"
#include "exec/cpu-defs.h"
#include "qom/cpu.h"
#define CPUArchState struct CPUOpenRISCState
/* cpu_openrisc_map_address_* in CPUOpenRISCTLBContext need this decl. */
struct OpenRISCCPU;
#include "qemu-common.h"
#include "exec/cpu-defs.h"
#include "qom/cpu.h"
#define TYPE_OPENRISC_CPU "or1k-cpu"
#define OPENRISC_CPU_CLASS(klass) \
@ -56,7 +54,6 @@ typedef struct OpenRISCCPUClass {
void (*parent_reset)(CPUState *cpu);
} OpenRISCCPUClass;
#define NB_MMU_MODES 3
#define TARGET_INSN_START_EXTRA_WORDS 1
enum {
@ -65,11 +62,6 @@ enum {
MMU_USER_IDX = 2,
};
#define TARGET_PAGE_BITS 13
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#define SET_FP_CAUSE(reg, v) do {\
(reg) = ((reg) & ~(0x3f << 12)) | \
((v & 0x3f) << 12);\