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target/riscv: Move misa_mxl_max to class

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misa_mxl_max is common for all instances of a RISC-V CPU class so they
are better put into class.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240203-riscv-v11-2-a23f4848a628@daynix.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Akihiko Odaki 2024-02-03 19:11:09 +09:00 • committed by Alistair Francis
parent 0e350c1ada
commit 742cc269c7
8 changed files with 112 additions and 99 deletions
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3
hw/riscv/boot.c
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@ -36,7 +36,8 @@
bool riscv_is_32bit(RISCVHartArrayState *harts)
{
return harts->harts[0].env.misa_mxl_max == MXL_RV32;
RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(&harts->harts[0]);
return mcc->misa_mxl_max == MXL_RV32;
}
/*