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target-arm: A64: Add SP entries for EL2 and 3
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1400980132-25949-10-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2 changed files with 4 additions and 4 deletions
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@ -163,7 +163,7 @@ typedef struct CPUARMState {
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uint64_t daif; /* exception masks, in the bits they are in in PSTATE */
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uint64_t elr_el[2]; /* AArch64 exception link regs */
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uint64_t sp_el[2]; /* AArch64 banked stack pointers */
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uint64_t sp_el[4]; /* AArch64 banked stack pointers */
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/* System control coprocessor (cp15) */
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struct {
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