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Use the standard ASE check for MIPS-3D and MT.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-10-23 17:04:27 +00:00
parent d8a5950a62
commit 7385ac0ba2
3 changed files with 80 additions and 93 deletions
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2
target-mips/translate_init.c
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@ -199,7 +199,7 @@ static mips_def_t mips_defs[] =
.CP0_SRSConf4_rw_bitmask = 0x3fffffff,
.CP0_SRSConf4 = (0x3fe << CP0SRSC4_SRS15) |
(0x3fe << CP0SRSC4_SRS14) | (0x3fe << CP0SRSC4_SRS13),
.insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP,
.insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP | ASE_MT,
},
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
{