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ppc patch queue 2018-11-08
Here's another patch of accumulated ppc patches for qemu-3.1. Highlights are: * Support for nested HV KVM on POWER9 hosts * Remove Alex Graf as ppc maintainer * Emulation of external PID instructions -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEdfRlhq5hpmzETofcbDjKyiDZs5IFAlvkKKMACgkQbDjKyiDZ s5KO3Q/+Ise1jJuTzL1/ga8cTF8wil/C9hJMQKXFtcVDJuCNL+RtIUGS1/zsGB/O 4Zemp0KxdCOoJKEvtndJSP/2b4++35edXO/u2vSLrtCGnidEnGcgaIBHve3huOPf zVtnbvRcNOHUbYC4GwsihqbxFI6hdKmMsR0THjpriCzTQPBjkqQyaK/oHyUFTS/F vNiWGxvJjOaFrszt0TSdEFwIcjtIib99zueAkIpIQIVpy65mM9VkL83CmV9ATfxP G9ZVWjCNzVSjGGKKArLCOnajaqdpGH8hKPqfTHjBOIapgCXJsDI1/+i1Kh2/H+Fa BaWxpR9lkMUQZniOn1oFGNmAKmLZiqAPRt5IeUruzKigfwlnG4gcv8LoZSOcxk/V Kh/Odra3dWIgfCcEr8qYp7tJ6+izAxb/iOOM2eHPN2eAejcO8tReyKwLgCxCX6jm obBlBocoRY8pEpgXjusgGWTiBwiJkPfx9cjlkvY+hHYeXpUkJiCkTURAWHM8+Nuh 9ZSqtoKuqSLIpsNi+oLT4qT4I0L14koRGu+ARVe5IpyJO36Ru3PtmnQKxeBm+559 sfgZiZ6fpJN2nOgKNPcP+kkxVm+W8hj8Uk2VGnl9ZLA7CPVSJaZRwQt0Gths41CC tmWcoQeYTCdElkjNQchs9+eoMRPIvs6x+TjgdrhaBg30d3O9kng= =NIAZ -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20181108' into staging ppc patch queue 2018-11-08 Here's another patch of accumulated ppc patches for qemu-3.1. Highlights are: * Support for nested HV KVM on POWER9 hosts * Remove Alex Graf as ppc maintainer * Emulation of external PID instructions # gpg: Signature made Thu 08 Nov 2018 12:14:27 GMT # gpg: using RSA key 6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-3.1-20181108: (22 commits) ppc/spapr_caps: Add SPAPR_CAP_NESTED_KVM_HV target/ppc: Add one reg id for ptcr This patch fixes processing of rfi instructions in icount mode. hw/ppc/ppc440_uc: Remove dead code in sdram_size() MAINTAINERS: PPC: Remove myself ppc/pnv: check size before data buffer access target/ppc: fix mtmsr instruction for icount hw/ppc/mac_newworld: Free openpic_irqs array after use macio/pmu: Fix missing vmsd terminator spapr_pci: convert g_malloc() to g_new() target/ppc: Split out float_invalid_cvt target/ppc: Split out float_invalid_op_div target/ppc: Split out float_invalid_op_mul target/ppc: Split out float_invalid_op_addsub target/ppc: Introduce fp number classification target/ppc: Remove float_check_status target/ppc: Split up float_invalid_op_excp hw/ppc/spapr_rng: Introduce CONFIG_SPAPR_RNG switch for spapr_rng.c PPC: e500: convert SysBus init method to a realize method ppc4xx_pci: convert SysBus init method to a realize method ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
7360be896a
26 changed files with 874 additions and 458 deletions
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@ -436,8 +436,9 @@ static AddressSpace *e500_pcihost_set_iommu(PCIBus *bus, void *opaque,
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return &s->bm_as;
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}
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static int e500_pcihost_initfn(SysBusDevice *dev)
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static void e500_pcihost_realize(DeviceState *dev, Error **errp)
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{
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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PCIHostState *h;
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PPCE500PCIState *s;
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PCIBus *b;
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@ -447,7 +448,7 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
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s = PPC_E500_PCI_HOST_BRIDGE(dev);
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for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
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sysbus_init_irq(dev, &s->irq[i]);
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sysbus_init_irq(sbd, &s->irq[i]);
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}
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for (i = 0; i < PCI_NUM_PINS; i++) {
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@ -460,7 +461,7 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
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/* PIO lives at the bottom of our bus space */
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memory_region_add_subregion_overlap(&s->busmem, 0, &s->pio, -2);
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b = pci_register_root_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
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b = pci_register_root_bus(dev, NULL, mpc85xx_pci_set_irq,
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mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
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PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
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h->bus = b;
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@ -483,10 +484,8 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
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memory_region_add_subregion(&s->container, PCIE500_CFGADDR, &h->conf_mem);
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memory_region_add_subregion(&s->container, PCIE500_CFGDATA, &h->data_mem);
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memory_region_add_subregion(&s->container, PCIE500_REG_BASE, &s->iomem);
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sysbus_init_mmio(dev, &s->container);
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sysbus_init_mmio(sbd, &s->container);
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pci_bus_set_route_irq_fn(b, e500_route_intx_pin_to_irq);
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return 0;
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}
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static void e500_host_bridge_class_init(ObjectClass *klass, void *data)
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@ -526,9 +525,8 @@ static Property pcihost_properties[] = {
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static void e500_pcihost_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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k->init = e500_pcihost_initfn;
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dc->realize = e500_pcihost_realize;
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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dc->props = pcihost_properties;
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dc->vmsd = &vmstate_ppce500_pci;
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