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target/riscv: rvv: Add mask agnostic for vector fix-point arithmetic instructions

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Signed-off-by: eop Chen <eop.chen@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <165570784143.17634.35095816584573691-6@git.sr.ht>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Yueh-Ting (eop) Chen 2022-06-20 06:51:11 +00:00 • committed by Alistair Francis
parent 6e11d7eaa0
commit 72e17a9f86
1 changed files with 16 additions and 10 deletions
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26
target/riscv/vector_helper.c
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@ -2129,10 +2129,12 @@ static inline void
vext_vv_rm_1(void *vd, void *v0, void *vs1, void *vs2, vext_vv_rm_1(void *vd, void *v0, void *vs1, void *vs2,
CPURISCVState *env, CPURISCVState *env,
uint32_t vl, uint32_t vm, int vxrm, uint32_t vl, uint32_t vm, int vxrm,
opivv2_rm_fn *fn) opivv2_rm_fn *fn, uint32_t vma, uint32_t esz)
{ {
for (uint32_t i = env->vstart; i < vl; i++) { for (uint32_t i = env->vstart; i < vl; i++) {
if (!vm && !vext_elem_mask(v0, i)) { if (!vm && !vext_elem_mask(v0, i)) {
/* set masked-off elements to 1s */
vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz);
continue; continue;
} }
fn(vd, vs1, vs2, i, env, vxrm); fn(vd, vs1, vs2, i, env, vxrm);
@ -2150,23 +2152,24 @@ vext_vv_rm_2(void *vd, void *v0, void *vs1, void *vs2,
uint32_t vl = env->vl; uint32_t vl = env->vl;
uint32_t total_elems = vext_get_total_elems(env, desc, esz); uint32_t total_elems = vext_get_total_elems(env, desc, esz);
uint32_t vta = vext_vta(desc); uint32_t vta = vext_vta(desc);
uint32_t vma = vext_vma(desc);
switch (env->vxrm) { switch (env->vxrm) {
case 0: /* rnu */ case 0: /* rnu */
vext_vv_rm_1(vd, v0, vs1, vs2, vext_vv_rm_1(vd, v0, vs1, vs2,
env, vl, vm, 0, fn); env, vl, vm, 0, fn, vma, esz);
break; break;
case 1: /* rne */ case 1: /* rne */
vext_vv_rm_1(vd, v0, vs1, vs2, vext_vv_rm_1(vd, v0, vs1, vs2,
env, vl, vm, 1, fn); env, vl, vm, 1, fn, vma, esz);
break; break;
case 2: /* rdn */ case 2: /* rdn */
vext_vv_rm_1(vd, v0, vs1, vs2, vext_vv_rm_1(vd, v0, vs1, vs2,
env, vl, vm, 2, fn); env, vl, vm, 2, fn, vma, esz);
break; break;
default: /* rod */ default: /* rod */
vext_vv_rm_1(vd, v0, vs1, vs2, vext_vv_rm_1(vd, v0, vs1, vs2,
env, vl, vm, 3, fn); env, vl, vm, 3, fn, vma, esz);
break; break;
} }
/* set tail elements to 1s */ /* set tail elements to 1s */
@ -2250,10 +2253,12 @@ static inline void
vext_vx_rm_1(void *vd, void *v0, target_long s1, void *vs2, vext_vx_rm_1(void *vd, void *v0, target_long s1, void *vs2,
CPURISCVState *env, CPURISCVState *env,
uint32_t vl, uint32_t vm, int vxrm, uint32_t vl, uint32_t vm, int vxrm,
opivx2_rm_fn *fn) opivx2_rm_fn *fn, uint32_t vma, uint32_t esz)
{ {
for (uint32_t i = env->vstart; i < vl; i++) { for (uint32_t i = env->vstart; i < vl; i++) {
if (!vm && !vext_elem_mask(v0, i)) { if (!vm && !vext_elem_mask(v0, i)) {
/* set masked-off elements to 1s */
vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz);
continue; continue;
} }
fn(vd, s1, vs2, i, env, vxrm); fn(vd, s1, vs2, i, env, vxrm);
@ -2271,23 +2276,24 @@ vext_vx_rm_2(void *vd, void *v0, target_long s1, void *vs2,
uint32_t vl = env->vl; uint32_t vl = env->vl;
uint32_t total_elems = vext_get_total_elems(env, desc, esz); uint32_t total_elems = vext_get_total_elems(env, desc, esz);
uint32_t vta = vext_vta(desc); uint32_t vta = vext_vta(desc);
uint32_t vma = vext_vma(desc);
switch (env->vxrm) { switch (env->vxrm) {
case 0: /* rnu */ case 0: /* rnu */
vext_vx_rm_1(vd, v0, s1, vs2, vext_vx_rm_1(vd, v0, s1, vs2,
env, vl, vm, 0, fn); env, vl, vm, 0, fn, vma, esz);
break; break;
case 1: /* rne */ case 1: /* rne */
vext_vx_rm_1(vd, v0, s1, vs2, vext_vx_rm_1(vd, v0, s1, vs2,
env, vl, vm, 1, fn); env, vl, vm, 1, fn, vma, esz);
break; break;
case 2: /* rdn */ case 2: /* rdn */
vext_vx_rm_1(vd, v0, s1, vs2, vext_vx_rm_1(vd, v0, s1, vs2,
env, vl, vm, 2, fn); env, vl, vm, 2, fn, vma, esz);
break; break;
default: /* rod */ default: /* rod */
vext_vx_rm_1(vd, v0, s1, vs2, vext_vx_rm_1(vd, v0, s1, vs2,
env, vl, vm, 3, fn); env, vl, vm, 3, fn, vma, esz);
break; break;
} }
/* set tail elements to 1s */ /* set tail elements to 1s */