aspeed/timer: Introduce an object class per SoC

The most important changes will be on the register range 0x34 - 0x3C
memops. Introduce class read/write operations to handle the
differences between SoCs.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-5-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Cédric Le Goater 2019-09-25 16:32:29 +02:00 committed by Peter Maydell
parent e09cf36321
commit 72d96f8e22
3 changed files with 113 additions and 12 deletions

View file

@ -28,6 +28,9 @@
#define ASPEED_TIMER(obj) \
OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER);
#define TYPE_ASPEED_TIMER "aspeed.timer"
#define TYPE_ASPEED_2400_TIMER TYPE_ASPEED_TIMER "-ast2400"
#define TYPE_ASPEED_2500_TIMER TYPE_ASPEED_TIMER "-ast2500"
#define ASPEED_TIMER_NR_TIMERS 8
typedef struct AspeedTimer {
@ -60,4 +63,16 @@ typedef struct AspeedTimerCtrlState {
AspeedSCUState *scu;
} AspeedTimerCtrlState;
#define ASPEED_TIMER_CLASS(klass) \
OBJECT_CLASS_CHECK(AspeedTimerClass, (klass), TYPE_ASPEED_TIMER)
#define ASPEED_TIMER_GET_CLASS(obj) \
OBJECT_GET_CLASS(AspeedTimerClass, (obj), TYPE_ASPEED_TIMER)
typedef struct AspeedTimerClass {
SysBusDeviceClass parent_class;
uint64_t (*read)(AspeedTimerCtrlState *s, hwaddr offset);
void (*write)(AspeedTimerCtrlState *s, hwaddr offset, uint64_t value);
} AspeedTimerClass;
#endif /* ASPEED_TIMER_H */