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target/arm: Move arm_pamax out of line

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We will shortly share parts of this function with other portions
of address translation.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220301215958.157011-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-03-01 11:59:44 -10:00 • committed by Peter Maydell
parent ebf93ce7c0
commit 71a77257dd
2 changed files with 23 additions and 18 deletions
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22
target/arm/helper.c
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@ -11152,6 +11152,28 @@ static uint8_t convert_stage2_attrs(CPUARMState *env, uint8_t s2attrs)
} }
#endif /* !CONFIG_USER_ONLY */ #endif /* !CONFIG_USER_ONLY */
/* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */
unsigned int arm_pamax(ARMCPU *cpu)
{
static const unsigned int pamax_map[] = {
[0] = 32,
[1] = 36,
[2] = 40,
[3] = 42,
[4] = 44,
[5] = 48,
};
unsigned int parange =
FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE);
/*
* id_aa64mmfr0 is a read-only register so values outside of the
* supported mappings can be considered an implementation error.
*/
assert(parange < ARRAY_SIZE(pamax_map));
return pamax_map[parange];
}
static int aa64_va_parameter_tbi(uint64_t tcr, ARMMMUIdx mmu_idx) static int aa64_va_parameter_tbi(uint64_t tcr, ARMMMUIdx mmu_idx)
{ {
if (regime_has_2_ranges(mmu_idx)) { if (regime_has_2_ranges(mmu_idx)) {

19
target/arm/internals.h
View file

@ -243,24 +243,7 @@ static inline void update_spsel(CPUARMState *env, uint32_t imm)
* Returns the implementation defined bit-width of physical addresses. * Returns the implementation defined bit-width of physical addresses.
* The ARMv8 reference manuals refer to this as PAMax(). * The ARMv8 reference manuals refer to this as PAMax().
*/ */
static inline unsigned int arm_pamax(ARMCPU *cpu) unsigned int arm_pamax(ARMCPU *cpu);
{
static const unsigned int pamax_map[] = {
[0] = 32,
[1] = 36,
[2] = 40,
[3] = 42,
[4] = 44,
[5] = 48,
};
unsigned int parange =
FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE);
/* id_aa64mmfr0 is a read-only register so values outside of the
* supported mappings can be considered an implementation error. */
assert(parange < ARRAY_SIZE(pamax_map));
return pamax_map[parange];
}
/* Return true if extended addresses are enabled. /* Return true if extended addresses are enabled.
* This is always the case if our translation regime is 64 bit, * This is always the case if our translation regime is 64 bit,